From: Jacob Lifshay <programmerjake@gmail.com>
Date: Thu, 26 Oct 2023 22:44:27 +0000 (-0700)
Subject: move DEFAULT_MSR handling from add_case to ISACaller
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=21f95f5bb243c937aed9f9ef28605f20b33b7b0e;p=openpower-isa.git

move DEFAULT_MSR handling from add_case to ISACaller
---

diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py
index 716f143c..ba6252c2 100644
--- a/src/openpower/decoder/isa/caller.py
+++ b/src/openpower/decoder/isa/caller.py
@@ -43,6 +43,7 @@ from openpower.decoder.power_svp64 import SVP64RM, decode_extra
 from openpower.decoder.selectable_int import (FieldSelectableInt,
                                               SelectableInt, selectconcat,
                                               EFFECTIVELY_UNLIMITED)
+from openpower.consts import DEFAULT_MSR
 from openpower.fpscr import FPSCRState
 from openpower.xer import XERState
 from openpower.util import LogKind, log
@@ -1196,6 +1197,8 @@ class ISACaller(ISACallerHelper, ISAFPHelpers, StepLoop):
         if initial_insns is None:
             initial_insns = {}
             assert self.respect_pc == False, "instructions required to honor pc"
+        if initial_msr is None:
+            initial_msr = DEFAULT_MSR
 
         log("ISACaller insns", respect_pc, initial_insns, disassembly)
         log("ISACaller initial_msr", initial_msr)
diff --git a/src/openpower/test/common.py b/src/openpower/test/common.py
index f3c2962e..c295531f 100644
--- a/src/openpower/test/common.py
+++ b/src/openpower/test/common.py
@@ -157,7 +157,7 @@ class TestAccumulatorBase:
             self.__subtest_args = old_subtest_args
 
     def add_case(self, prog, initial_regs=None, initial_sprs=None,
-                 initial_cr=0, initial_msr=DEFAULT_MSR,
+                 initial_cr=0, initial_msr=None,
                  initial_mem=None,
                  initial_svstate=0,
                  expected=None,