From: Luke Kenneth Casson Leighton Date: Fri, 22 Dec 2023 09:05:59 +0000 (+0000) Subject: bug 1155: clarify python remap bigmul demo function with short vars X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=220ee02f8976f61cab3201ce3bf4b19f6f6ab482;p=openpower-isa.git bug 1155: clarify python remap bigmul demo function with short vars --- diff --git a/src/openpower/test/bigint/powmod.py b/src/openpower/test/bigint/powmod.py index 73d87b35..13c092e8 100644 --- a/src/openpower/test/bigint/powmod.py +++ b/src/openpower/test/bigint/powmod.py @@ -102,19 +102,14 @@ def python_mul_algorithm(a, b): def python_mul_remap_algorithm(a, b): # version 2 of the MUL_256_X_256_TO_512_ASM algorithm using base 100 rather # than 2^64, since that's easier to read. - # run this file in a debugger to see all the intermediate values. - a_sz = len(a) - b_sz = len(b) - a_idx = [] - b_idx = [] - a_plus_b_idx = [] - a_plus_b_plus_1_idx = [] + a_sz, b_sz = len(a), = len(b) + ai, bi, apbi, apbp1 = [], [], [], [] # REMAP indices for ai in range(a_sz): for bi in range(b_sz): - a_idx.append(ai) - b_idx.append(bi) - a_plus_b_idx.append(ai + bi) - a_plus_b_plus_1_idx.append(ai + bi + 1) + ai.append(ai) + bi.append(bi) + apbi.append(ai + bi) + apbp1.append(ai + bi + 1) y = [0] * (a_sz + b_sz) ca = 0 @@ -124,10 +119,8 @@ def python_mul_remap_algorithm(a, b): # always be zero when (i % b_sz == 0). # That said, hardware will probably want to pattern-match this to # remove the unnecessary dependency through ca. - y[a_plus_b_idx[i]], t = maddedu( - a[a_idx[i]], b[b_idx[i]], y[a_plus_b_idx[i]]) - y[a_plus_b_plus_1_idx[i]], ca = adde( - y[a_plus_b_plus_1_idx[i]], t, ca) + y[apbi[i]], t = maddedu(a[ai[i]], b[bi[i]], y[apbi[i]]) + y[apbp1[i]], ca = adde(y[apbp1[i]], t, ca) return y