From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 11 Apr 2019 01:06:33 +0000 (-0700)
Subject: Add non-input bits driven by unrecognised cells as ci_bits
X-Git-Tag: working-ls180~1237^2~244
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2217d59e299ce0cc15887d53308d7b7cb6400c52;p=yosys.git

Add non-input bits driven by unrecognised cells as ci_bits
---

diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc
index a4ef89931..bad9322bb 100644
--- a/backends/aiger/xaiger.cc
+++ b/backends/aiger/xaiger.cc
@@ -229,7 +229,7 @@ struct XAigerWriter
 					}
 					if (is_output) {
 						SigBit O = sigmap(b);
-						if (!input_bits.count(O) && !output_bits.count(O))
+						if (!input_bits.count(O))
 							ci_bits.insert(O);
 					}
 				}