From: Alan Modra Date: Tue, 27 Oct 2020 11:06:06 +0000 (+1030) Subject: [RS6000] power10 scan-assembler tests X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2241061463ad43de95eb7d3e07546bcb5efa8607;p=gcc.git [RS6000] power10 scan-assembler tests On power10 these are "dg-do run" tests, so need -save-temps for the assembler scanning. * gcc.target/powerpc/vsx-load-element-extend-char.c: Add -save-temps. * gcc.target/powerpc/vsx-load-element-extend-int.c: Likewise. * gcc.target/powerpc/vsx-load-element-extend-longlong.c: Likewise. * gcc.target/powerpc/vsx-load-element-extend-short.c: Likewise. * gcc.target/powerpc/vsx-store-element-truncate-char.c: Likewise. * gcc.target/powerpc/vsx-store-element-truncate-int.c: Likewise. * gcc.target/powerpc/vsx-store-element-truncate-longlong.c: Likewise. * gcc.target/powerpc/vsx-store-element-truncate-short.c: Likewise. --- diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c index 58986d636e4..f386346e059 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c @@ -5,7 +5,7 @@ /* { dg-do compile {target power10_ok} } */ /* { dg-do run {target power10_hw} } */ /* { dg-require-effective-target int128 } */ -/* { dg-options "-mdejagnu-cpu=power10 -O3" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O3 -save-temps" } */ /* At the time of writing, the number of lxvrbx instructions is double what we expect because we are generating a diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c index 366a0137004..ea737466a58 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c @@ -10,7 +10,7 @@ the lxvr*x instruction is generated. At higher optimization levels the instruction we are looking for is sometimes replaced by other load instructions. */ -/* { dg-options "-mdejagnu-cpu=power10 -O0" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */ /* { dg-final { scan-assembler-times {\mlxvrwx\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c index 8dfbc79a33d..cd155c2013d 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c @@ -5,7 +5,7 @@ /* { dg-do compile {target power10_ok} } */ /* { dg-do run {target power10_hw} } */ /* { dg-require-effective-target int128 } */ -/* { dg-options "-mdejagnu-cpu=power10 -O3" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O3 -save-temps" } */ /* At time of writing, we also geenerate a .constrprop copy of the function, so our instruction hit count is diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c index 87e263c864d..68fdcdcea37 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c @@ -10,7 +10,7 @@ the lxvr*x instruction is generated. At higher optimization levels the instruction we are looking for is sometimes replaced by other load instructions. */ -/* { dg-options "-mdejagnu-cpu=power10 -O0" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */ /* { dg-final { scan-assembler-times {\mlxvrhx\M} 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c index b69a1f3e291..45c49547d66 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c @@ -8,7 +8,7 @@ the stxvr*x instruction is generated. At higher optimization levels the instruction we are looking for is sometimes replaced by other store instructions. */ -/* { dg-options "-mdejagnu-cpu=power10 -O0" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */ /* { dg-final { scan-assembler-times {\mstxvrbx\M} 2 } } */ /* { dg-final { scan-assembler-times {\mstbx\M} 0 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c index 76e09fde068..f263e3d5cc9 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c @@ -8,7 +8,7 @@ the stxvr*x instruction is generated. At higher optimization levels the instruction we are looking for is sometimes replaced by other store instructions. */ -/* { dg-options "-mdejagnu-cpu=power10 -O0" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */ /* { dg-final { scan-assembler-times {\mstxvrwx\M} 2 } } */ /* { dg-final { scan-assembler-times {\mstwx\M} 0 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c index c137ce2d19f..0eeef5e6ba9 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c @@ -9,7 +9,7 @@ the stxvr*x instruction is generated. At higher optimization levels the instruction we are looking for is sometimes replaced by other store instructions. */ -/* { dg-options "-mdejagnu-cpu=power10 -O0" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */ /* { dg-final { scan-assembler-times {\mstxvrdx\M} 2 } } */ /* { dg-final { scan-assembler-times {\mstwx\M} 0 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c index 7d856e7c3eb..0186ddc552f 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c @@ -9,7 +9,7 @@ the stxvr*x instruction is generated. At higher optimization levels the instruction we are looking for is sometimes replaced by other store instructions. */ -/* { dg-options "-mdejagnu-cpu=power10 -O0" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */ /* { dg-final { scan-assembler-times {\mstxvrhx\M} 2 } } */ /* { dg-final { scan-assembler-times {\msthx\M} 0 } } */