From: Nathan Binkert Date: Sat, 23 Oct 2004 14:41:35 +0000 (-0400) Subject: get rid of pmap.h and make things variables and inline X-Git-Tag: m5_1.0_tutorial~161^2~4 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=224acc2abccec14ab3846f1b3308e642ed094456;p=gem5.git get rid of pmap.h and make things variables and inline functions instead of preprocessor macros. arch/alpha/vtophys.cc: use new constants, functions and structs to clean up the vtophys code. arch/alpha/vtophys.hh: Clean up a little bit and make the protypes match new changes. base/remote_gdb.cc: dev/ide_disk.cc: kern/tru64/tru64_events.cc: use new constants from isa_traits.hh instead of ones from old pmap.h --HG-- extra : convert_revision : 5dce34e3b0c84ba72cefca34e5999b99898edcef --- diff --git a/arch/alpha/vtophys.cc b/arch/alpha/vtophys.cc index 493a2380e..a8af8f238 100644 --- a/arch/alpha/vtophys.cc +++ b/arch/alpha/vtophys.cc @@ -28,7 +28,6 @@ #include -#include "arch/alpha/pmap.h" #include "arch/alpha/vtophys.hh" #include "base/trace.hh" #include "cpu/exec_context.hh" @@ -36,52 +35,40 @@ using namespace std; -inline Addr -level3_index(Addr vaddr) -{ return (vaddr >> ALPHA_PGSHIFT) & PTEMASK; } - -inline Addr -level2_index(Addr vaddr) -{ return (vaddr >> (ALPHA_PGSHIFT + NPTEPG_SHIFT)) & PTEMASK; } - -inline Addr -level1_index(Addr vaddr) -{ return (vaddr >> (ALPHA_PGSHIFT + 2 * NPTEPG_SHIFT)) & PTEMASK; } - -Addr -kernel_pte_lookup(PhysicalMemory *pmem, Addr ptbr, Addr vaddr) +AlphaISA::PageTableEntry +kernel_pte_lookup(PhysicalMemory *pmem, Addr ptbr, AlphaISA::VAddr vaddr) { - uint64_t level1_map = ptbr; - Addr level1_pte = level1_map + (level1_index(vaddr) << PTESHIFT); - - uint64_t level1 = pmem->phys_read_qword(level1_pte); - if (!entry_valid(level1)) { + Addr level1_pte = ptbr + vaddr.level1(); + AlphaISA::PageTableEntry level1 = pmem->phys_read_qword(level1_pte); + if (!level1.valid()) { DPRINTF(VtoPhys, "level 1 PTE not valid, va = %#\n", vaddr); return 0; } - uint64_t level2_map = PMAP_PTE_PA(level1); - Addr level2_pte = level2_map + (level2_index(vaddr) << PTESHIFT); - uint64_t level2 = pmem->phys_read_qword(level2_pte); - if (!entry_valid(level2)) { + Addr level2_pte = level1.paddr() + vaddr.level2(); + AlphaISA::PageTableEntry level2 = pmem->phys_read_qword(level2_pte); + if (!level2.valid()) { DPRINTF(VtoPhys, "level 2 PTE not valid, va = %#x\n", vaddr); return 0; } - uint64_t level3_map = PMAP_PTE_PA(level2); - Addr level3_pte = level3_map + (level3_index(vaddr) << PTESHIFT); - - return level3_pte; + Addr level3_pte = level2.paddr() + vaddr.level3(); + AlphaISA::PageTableEntry level3 = pmem->phys_read_qword(level3_pte); + if (!level3.valid()) { + DPRINTF(VtoPhys, "level 3 PTE not valid, va = %#x\n", vaddr); + return 0; + } + return level3; } Addr vtophys(PhysicalMemory *xc, Addr vaddr) { Addr paddr = 0; - if (vaddr < ALPHA_K0SEG_BASE) + if (AlphaISA::IsUSeg(vaddr)) DPRINTF(VtoPhys, "vtophys: invalid vaddr %#x", vaddr); - else if (vaddr < ALPHA_K1SEG_BASE) - paddr = ALPHA_K0SEG_TO_PHYS(vaddr); + else if (AlphaISA::IsK0Seg(vaddr)) + paddr = AlphaISA::K0Seg2Phys(vaddr); else panic("vtophys: ptbr is not set on virtual lookup"); @@ -91,8 +78,9 @@ vtophys(PhysicalMemory *xc, Addr vaddr) } Addr -vtophys(ExecContext *xc, Addr vaddr) +vtophys(ExecContext *xc, Addr addr) { + AlphaISA::VAddr vaddr = addr; Addr ptbr = xc->regs.ipr[AlphaISA::IPR_PALtemp20]; Addr paddr = 0; //@todo Andrew couldn't remember why he commented some of this code @@ -100,15 +88,15 @@ vtophys(ExecContext *xc, Addr vaddr) if (PC_PAL(vaddr) && (vaddr < PAL_MAX)) { paddr = vaddr & ~ULL(1); } else { - if (vaddr >= ALPHA_K0SEG_BASE && vaddr <= ALPHA_K0SEG_END) { - paddr = ALPHA_K0SEG_TO_PHYS(vaddr); + if (AlphaISA::IsK0Seg(vaddr)) { + paddr = AlphaISA::K0Seg2Phys(vaddr); } else if (!ptbr) { paddr = vaddr; } else { - Addr pte = kernel_pte_lookup(xc->physmem, ptbr, vaddr); - uint64_t entry = xc->physmem->phys_read_qword(pte); - if (pte && entry_valid(entry)) - paddr = PMAP_PTE_PA(entry) | (vaddr & ALPHA_PGOFSET); + AlphaISA::PageTableEntry pte = + kernel_pte_lookup(xc->physmem, ptbr, vaddr); + if (pte.valid()) + paddr = pte.paddr() | vaddr.offset(); } } @@ -140,7 +128,8 @@ CopyOut(ExecContext *xc, void *dest, Addr src, size_t cplen) int len; paddr = vtophys(xc, src); - len = min((int)(ALPHA_PGBYTES - (paddr & ALPHA_PGOFSET)), (int)cplen); + len = min((int)(AlphaISA::PageBytes - (paddr & AlphaISA::PageOffset)), + (int)cplen); dmaaddr = (char *)xc->physmem->dma_addr(paddr, len); assert(dmaaddr); @@ -152,15 +141,15 @@ CopyOut(ExecContext *xc, void *dest, Addr src, size_t cplen) dst += len; src += len; - while (cplen > ALPHA_PGBYTES) { + while (cplen > AlphaISA::PageBytes) { paddr = vtophys(xc, src); - dmaaddr = (char *)xc->physmem->dma_addr(paddr, ALPHA_PGBYTES); + dmaaddr = (char *)xc->physmem->dma_addr(paddr, AlphaISA::PageBytes); assert(dmaaddr); - memcpy(dst, dmaaddr, ALPHA_PGBYTES); - cplen -= ALPHA_PGBYTES; - dst += ALPHA_PGBYTES; - src += ALPHA_PGBYTES; + memcpy(dst, dmaaddr, AlphaISA::PageBytes); + cplen -= AlphaISA::PageBytes; + dst += AlphaISA::PageBytes; + src += AlphaISA::PageBytes; } if (cplen > 0) { @@ -181,7 +170,8 @@ CopyIn(ExecContext *xc, Addr dest, void *source, size_t cplen) int len; paddr = vtophys(xc, dest); - len = min((int)(ALPHA_PGBYTES - (paddr & ALPHA_PGOFSET)), (int)cplen); + len = min((int)(AlphaISA::PageBytes - (paddr & AlphaISA::PageOffset)), + (int)cplen); dmaaddr = (char *)xc->physmem->dma_addr(paddr, len); assert(dmaaddr); @@ -193,15 +183,15 @@ CopyIn(ExecContext *xc, Addr dest, void *source, size_t cplen) src += len; dest += len; - while (cplen > ALPHA_PGBYTES) { + while (cplen > AlphaISA::PageBytes) { paddr = vtophys(xc, dest); - dmaaddr = (char *)xc->physmem->dma_addr(paddr, ALPHA_PGBYTES); + dmaaddr = (char *)xc->physmem->dma_addr(paddr, AlphaISA::PageBytes); assert(dmaaddr); - memcpy(dmaaddr, src, ALPHA_PGBYTES); - cplen -= ALPHA_PGBYTES; - src += ALPHA_PGBYTES; - dest += ALPHA_PGBYTES; + memcpy(dmaaddr, src, AlphaISA::PageBytes); + cplen -= AlphaISA::PageBytes; + src += AlphaISA::PageBytes; + dest += AlphaISA::PageBytes; } if (cplen > 0) { @@ -221,7 +211,8 @@ CopyString(ExecContext *xc, char *dst, Addr vaddr, size_t maxlen) int len; paddr = vtophys(xc, vaddr); - len = min((int)(ALPHA_PGBYTES - (paddr & ALPHA_PGOFSET)), (int)maxlen); + len = min((int)(AlphaISA::PageBytes - (paddr & AlphaISA::PageOffset)), + (int)maxlen); dmaaddr = (char *)xc->physmem->dma_addr(paddr, len); assert(dmaaddr); @@ -238,21 +229,21 @@ CopyString(ExecContext *xc, char *dst, Addr vaddr, size_t maxlen) dst += len; vaddr += len; - while (maxlen > ALPHA_PGBYTES) { + while (maxlen > AlphaISA::PageBytes) { paddr = vtophys(xc, vaddr); - dmaaddr = (char *)xc->physmem->dma_addr(paddr, ALPHA_PGBYTES); + dmaaddr = (char *)xc->physmem->dma_addr(paddr, AlphaISA::PageBytes); assert(dmaaddr); - char *term = (char *)memchr(dmaaddr, 0, ALPHA_PGBYTES); - len = term ? (term - dmaaddr + 1) : ALPHA_PGBYTES; + char *term = (char *)memchr(dmaaddr, 0, AlphaISA::PageBytes); + len = term ? (term - dmaaddr + 1) : AlphaISA::PageBytes; memcpy(dst, dmaaddr, len); if (term) return; - maxlen -= ALPHA_PGBYTES; - dst += ALPHA_PGBYTES; - vaddr += ALPHA_PGBYTES; + maxlen -= AlphaISA::PageBytes; + dst += AlphaISA::PageBytes; + vaddr += AlphaISA::PageBytes; } if (maxlen > 0) { diff --git a/arch/alpha/vtophys.hh b/arch/alpha/vtophys.hh index f26404924..8e47a0031 100644 --- a/arch/alpha/vtophys.hh +++ b/arch/alpha/vtophys.hh @@ -26,19 +26,17 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __VTOPHYS_H__ -#define __VTOPHYS_H__ +#ifndef __ARCH_ALPHA_VTOPHYS_H__ +#define __ARCH_ALPHA_VTOPHYS_H__ #include "arch/alpha/isa_traits.hh" -#include "arch/alpha/pmap.h" - -inline bool entry_valid(uint64_t entry) -{ return (entry & ALPHA_PTE_VALID) != 0; } class ExecContext; class PhysicalMemory; -Addr kernel_pte_lookup(PhysicalMemory *pmem, Addr ptbr, Addr vaddr); +AlphaISA::PageTableEntry +kernel_pte_lookup(PhysicalMemory *pmem, Addr ptbr, AlphaISA::VAddr vaddr); + Addr vtophys(PhysicalMemory *xc, Addr vaddr); Addr vtophys(ExecContext *xc, Addr vaddr); uint8_t *vtomem(ExecContext *xc, Addr vaddr, size_t len); @@ -48,5 +46,5 @@ void CopyOut(ExecContext *xc, void *dst, Addr src, size_t len); void CopyIn(ExecContext *xc, Addr dst, void *src, size_t len); void CopyString(ExecContext *xc, char *dst, Addr vaddr, size_t maxlen); -#endif // __VTOPHYS_H__ +#endif // __ARCH_ALPHA_VTOPHYS_H__ diff --git a/base/remote_gdb.cc b/base/remote_gdb.cc index 41f11005d..598f03c35 100644 --- a/base/remote_gdb.cc +++ b/base/remote_gdb.cc @@ -326,14 +326,13 @@ bool RemoteGDB::acc(Addr va, size_t len) { Addr last_va; - Addr pte; - va = alpha_trunc_page(va); - last_va = alpha_round_page(va + len); + va = TheISA::TruncPage(va); + last_va = TheISA::RoundPage(va + len); do { - if (va >= ALPHA_K0SEG_BASE && va < ALPHA_K1SEG_BASE) { - if (va < (ALPHA_K0SEG_BASE + pmem->size())) { + if (TheISA::IsK0Seg(va)) { + if (va < (TheISA::K0SegBase + pmem->size())) { DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= " "%#x < K0SEG + size\n", va); return true; @@ -355,12 +354,12 @@ RemoteGDB::acc(Addr va, size_t len) return true; Addr ptbr = context->regs.ipr[AlphaISA::IPR_PALtemp20]; - pte = kernel_pte_lookup(pmem, ptbr, va); - if (!pte || !entry_valid(pmem->phys_read_qword(pte))) { + TheISA::PageTableEntry pte = kernel_pte_lookup(pmem, ptbr, va); + if (!pte.valid()) { DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va); return false; } - va += ALPHA_PGBYTES; + va += TheISA::PageBytes; } while (va < last_va); DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); diff --git a/dev/ide_disk.cc b/dev/ide_disk.cc index 99724f077..405b77eca 100644 --- a/dev/ide_disk.cc +++ b/dev/ide_disk.cc @@ -35,7 +35,6 @@ #include #include -#include "arch/alpha/pmap.h" #include "base/cprintf.hh" // csprintf #include "base/trace.hh" #include "dev/disk_image.hh" @@ -51,6 +50,7 @@ #include "sim/builder.hh" #include "sim/sim_object.hh" #include "sim/universe.hh" +#include "targetarch/isa_traits.hh" using namespace std; @@ -188,14 +188,14 @@ IdeDisk::bytesInDmaPage(Addr curAddr, uint32_t bytesLeft) uint32_t bytesInPage = 0; // First calculate how many bytes could be in the page - if (bytesLeft > ALPHA_PGBYTES) - bytesInPage = ALPHA_PGBYTES; + if (bytesLeft > TheISA::PageBytes) + bytesInPage = TheISA::PageBytes; else bytesInPage = bytesLeft; // Next, see if we have crossed a page boundary, and adjust Addr upperBound = curAddr + bytesInPage; - Addr pageBound = alpha_trunc_page(curAddr) + ALPHA_PGBYTES; + Addr pageBound = TheISA::TruncPage(curAddr) + TheISA::PageBytes; assert(upperBound >= curAddr && "DMA read wraps around address space!\n"); @@ -510,7 +510,7 @@ IdeDisk::dmaWriteDone() // setup the initial page and DMA address curAddr = curPrd.getBaseAddr(); - pageAddr = alpha_trunc_page(curAddr); + pageAddr = TheISA::TruncPage(curAddr); dmaAddr = pciToDma(curAddr); // clear out the data buffer @@ -518,14 +518,14 @@ IdeDisk::dmaWriteDone() while (bytesRead < curPrd.getByteCount()) { // see if we have crossed into a new page - if (pageAddr != alpha_trunc_page(curAddr)) { + if (pageAddr != TheISA::TruncPage(curAddr)) { // write the data to memory memcpy(physmem->dma_addr(dmaAddr, bytesInPage), (void *)(dataBuffer + (bytesRead - bytesInPage)), bytesInPage); // update the DMA address and page address - pageAddr = alpha_trunc_page(curAddr); + pageAddr = TheISA::TruncPage(curAddr); dmaAddr = pciToDma(curAddr); bytesInPage = 0; diff --git a/kern/tru64/tru64_events.cc b/kern/tru64/tru64_events.cc index fb9d43a0e..a322060d8 100644 --- a/kern/tru64/tru64_events.cc +++ b/kern/tru64/tru64_events.cc @@ -32,8 +32,9 @@ #include "kern/tru64/tru64_events.hh" #include "kern/tru64/dump_mbuf.hh" #include "kern/tru64/printf.hh" -#include "targetarch/arguments.hh" #include "mem/functional_mem/memory_control.hh" +#include "targetarch/arguments.hh" +#include "targetarch/isa_traits.hh" //void SkipFuncEvent::process(ExecContext *xc); @@ -46,8 +47,8 @@ BadAddrEvent::process(ExecContext *xc) uint64_t a0 = xc->regs.intRegFile[ArgumentReg0]; - if (a0 < ALPHA_K0SEG_BASE || a0 >= ALPHA_K1SEG_BASE || - xc->memctrl->badaddr(ALPHA_K0SEG_TO_PHYS(a0) & PA_IMPL_MASK)) { + if (!TheISA::IsK0Seg(a0) || + xc->memctrl->badaddr(TheISA::K0Seg2Phys(a0) & PA_IMPL_MASK)) { DPRINTF(BADADDR, "badaddr arg=%#x bad\n", a0); xc->regs.intRegFile[ReturnValueReg] = 0x1;