From: Luke Kenneth Casson Leighton Date: Thu, 25 Jul 2019 15:52:14 +0000 (+0100) Subject: get test_div64.py back up and running (just... because) X-Git-Tag: ls180-24jan2020~726 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=227beafdd8e4432cc4543de6391879cf64c1de4b;p=ieee754fpu.git get test_div64.py back up and running (just... because) --- diff --git a/src/ieee754/fpcommon/test/unit_test_double.py b/src/ieee754/fpcommon/test/unit_test_double.py index 2714273e..07d712bf 100644 --- a/src/ieee754/fpcommon/test/unit_test_double.py +++ b/src/ieee754/fpcommon/test/unit_test_double.py @@ -50,60 +50,76 @@ def nan(s): def zero(s): return s<<63 -def get_case(dut, a, b): +def get_case(dut, a, b, mid): + #yield dut.in_mid.eq(mid) yield dut.in_a.v.eq(a) - yield dut.in_a.stb.eq(1) + yield dut.in_a.valid_i_test.eq(1) yield yield - a_ack = (yield dut.in_a.ack) + yield + yield + a_ack = (yield dut.in_a.ready_o) assert a_ack == 0 + + yield dut.in_a.valid_i.eq(0) + yield dut.in_b.v.eq(b) - yield dut.in_b.stb.eq(1) - b_ack = (yield dut.in_b.ack) + yield dut.in_b.valid_i.eq(1) + yield + yield + b_ack = (yield dut.in_b.ready_o) assert b_ack == 0 + yield dut.in_b.valid_i.eq(0) + + yield dut.out_z.ready_i.eq(1) + while True: - yield - out_z_stb = (yield dut.out_z.stb) + out_z_stb = (yield dut.out_z.valid_o) if not out_z_stb: + yield continue - yield dut.in_a.stb.eq(0) - yield dut.in_b.stb.eq(0) - yield dut.out_z.ack.eq(1) - yield - yield dut.out_z.ack.eq(0) - yield + out_z = yield dut.out_z.v + #out_mid = yield dut.out_mid + yield dut.out_z.ready_i.eq(0) yield break - out_z = yield dut.out_z.v - return out_z + return out_z, mid # TODO: mid -def check_case(dut, a, b, z): - out_z = yield from get_case(dut, a, b) +def check_case(dut, a, b, z, mid=None): + if mid is None: + mid = randint(0, 6) + mid = 0 + out_z, out_mid = yield from get_case(dut, a, b, mid) assert out_z == z, "Output z 0x%x not equal to expected 0x%x" % (out_z, z) + assert out_mid == mid, "Output mid 0x%x != expected 0x%x" % (out_mid, mid) -def run_fpunit(dut, stimulus_a, stimulus_b, op): +def run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn): expected_responses = [] actual_responses = [] for a, b in zip(stimulus_a, stimulus_b): + mid = randint(0, 6) + mid = 0 af = Float64.from_bits(a) bf = Float64.from_bits(b) z = op(af, bf) - expected_responses.append(z.get_bits()) - #print (af, bf, z) - actual = yield from get_case(dut, a, b) + expected_responses.append((z.get_bits(), mid)) + actual = yield from get_case_fn(dut, a, b, mid) actual_responses.append(actual) if len(actual_responses) < len(expected_responses): print ("Fail ... not enough results") exit(0) - for exp, act, a, b in zip(expected_responses, actual_responses, + for expected, actual, a, b in zip(expected_responses, actual_responses, stimulus_a, stimulus_b): - passed = match(exp, act) + passed = match(expected[0], actual[0]) + if expected[1] != actual[1]: # check mid + print ("MID failed", expected[1], actual[1]) + sys.exit(0) if not passed: @@ -136,7 +152,7 @@ def run_fpunit(dut, stimulus_a, stimulus_b, op): sys.exit(0) -def run_corner_cases(dut, count, op): +def run_corner_cases(dut, count, op, get_case_fn): #corner cases from itertools import permutations stimulus_a = [i[0] for i in permutations([ @@ -155,82 +171,82 @@ def run_corner_cases(dut, count, op): 0x7ff0000000000000, 0xfff0000000000000 ], 2)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += len(stimulus_a) print (count, "vectors passed") -def run_edge_cases(dut, count, op, maxcount=1000, num_loops=1000): +def run_edge_cases(dut, count, op, get_case_fn, maxcount=1000, num_loops=1000): #edge cases stimulus_a = [0x8000000000000000 for i in range(maxcount)] stimulus_b = [randint(0, 1<<64) for i in range(maxcount)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += len(stimulus_a) print (count, "vectors passed") stimulus_a = [0x0000000000000000 for i in range(maxcount)] stimulus_b = [randint(0, 1<<64) for i in range(maxcount)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += len(stimulus_a) print (count, "vectors passed") stimulus_b = [0x8000000000000000 for i in range(maxcount)] stimulus_a = [randint(0, 1<<64) for i in range(maxcount)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += len(stimulus_a) print (count, "vectors passed") stimulus_b = [0x0000000000000000 for i in range(maxcount)] stimulus_a = [randint(0, 1<<64) for i in range(maxcount)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += len(stimulus_a) print (count, "vectors passed") stimulus_a = [0x7FF8000000000000 for i in range(maxcount)] stimulus_b = [randint(0, 1<<64) for i in range(maxcount)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += len(stimulus_a) print (count, "vectors passed") stimulus_a = [0xFFF8000000000000 for i in range(maxcount)] stimulus_b = [randint(0, 1<<64) for i in range(maxcount)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += len(stimulus_a) print (count, "vectors passed") stimulus_b = [0x7FF8000000000000 for i in range(maxcount)] stimulus_a = [randint(0, 1<<64) for i in range(maxcount)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += len(stimulus_a) print (count, "vectors passed") stimulus_b = [0xFFF8000000000000 for i in range(maxcount)] stimulus_a = [randint(0, 1<<64) for i in range(maxcount)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += len(stimulus_a) print (count, "vectors passed") stimulus_a = [0x7FF0000000000000 for i in range(maxcount)] stimulus_b = [randint(0, 1<<64) for i in range(maxcount)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += len(stimulus_a) print (count, "vectors passed") stimulus_a = [0xFFF0000000000000 for i in range(maxcount)] stimulus_b = [randint(0, 1<<64) for i in range(maxcount)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += len(stimulus_a) print (count, "vectors passed") stimulus_b = [0x7FF0000000000000 for i in range(maxcount)] stimulus_a = [randint(0, 1<<64) for i in range(maxcount)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += len(stimulus_a) print (count, "vectors passed") stimulus_b = [0xFFF0000000000000 for i in range(maxcount)] stimulus_a = [randint(0, 1<<64) for i in range(maxcount)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += len(stimulus_a) print (count, "vectors passed") @@ -238,7 +254,7 @@ def run_edge_cases(dut, count, op, maxcount=1000, num_loops=1000): for i in range(num_loops): stimulus_a = [randint(0, 1<<64) for i in range(maxcount)] stimulus_b = [randint(0, 1<<64) for i in range(maxcount)] - yield from run_fpunit(dut, stimulus_a, stimulus_b, op) + yield from run_fpunit(dut, stimulus_a, stimulus_b, op, get_case_fn) count += maxcount print (count, "random vectors passed") diff --git a/src/ieee754/fpdiv/test/test_div64.py b/src/ieee754/fpdiv/test/test_div64.py index 5a9daf23..16162445 100644 --- a/src/ieee754/fpdiv/test/test_div64.py +++ b/src/ieee754/fpdiv/test/test_div64.py @@ -1,49 +1,14 @@ from nmigen import Module, Signal from nmigen.compat.sim import run_simulation +from operator import truediv -from nmigen_div_experiment import FPDIV +from ieee754.fpdiv.nmigen_div_experiment import FPDIV -class ORGate: - def __init__(self): - self.a = Signal() - self.b = Signal() - self.x = Signal() - - def elaborate(self, platform=None): - - m = Module() - m.d.comb += self.x.eq(self.a | self.b) - - return m - -def check_case(dut, a, b, z): - yield dut.in_a.v.eq(a) - yield dut.in_a.stb.eq(1) - yield - yield - a_ack = (yield dut.in_a.ack) - assert a_ack == 0 - yield dut.in_b.v.eq(b) - yield dut.in_b.stb.eq(1) - b_ack = (yield dut.in_b.ack) - assert b_ack == 0 - - while True: - yield - out_z_stb = (yield dut.out_z.stb) - if not out_z_stb: - continue - yield dut.in_a.stb.eq(0) - yield dut.in_b.stb.eq(0) - yield dut.out_z.ack.eq(1) - yield - yield dut.out_z.ack.eq(0) - yield - yield - break - - out_z = yield dut.out_z.v - assert out_z == z, "Output z 0x%x not equal to expected 0x%x" % (out_z, z) +from ieee754.fpcommon.test.unit_test_double import (get_mantissa, + get_exponent, get_sign, is_nan, + is_inf, is_pos_inf, is_neg_inf, + match, get_case, check_case, run_fpunit, + run_edge_cases, run_corner_cases) def testbench(dut): yield from check_case(dut, 0x4008000000000000, 0x3FF0000000000000, @@ -51,15 +16,18 @@ def testbench(dut): yield from check_case(dut, 0x3FF0000000000000, 0x4008000000000000, 0x3FD5555555555555) - if False: - yield from check_case(dut, 0x3F800000, 0x40000000, 0x3F000000) - yield from check_case(dut, 0x3F800000, 0x40400000, 0x3EAAAAAB) - yield from check_case(dut, 0x40400000, 0x41F80000, 0x3DC6318C) - yield from check_case(dut, 0x41F9EB4D, 0x429A4C70, 0x3ECF52B2) - yield from check_case(dut, 0x7F7FFFFE, 0x70033181, 0x4EF9C4C8) - yield from check_case(dut, 0x7F7FFFFE, 0x70000001, 0x4EFFFFFC) - yield from check_case(dut, 0x7F7FFCFF, 0x70200201, 0x4ECCC7D5) - yield from check_case(dut, 0x70200201, 0x7F7FFCFF, 0x302003E2) + count = 0 + + #regression tests + #stimulus_a = [0xbf9b1e94, 0x34082401, 0x5e8ef81, 0x5c75da81, 0x2b017] + #stimulus_b = [0xc038ed3a, 0xb328cd45, 0x114f3db, 0x2f642a39, 0xff3807ab] + #yield from run_fpunit(dut, stimulus_a, stimulus_b, truediv, get_case) + #count += len(stimulus_a) + #print (count, "vectors passed") + + yield from run_corner_cases(dut, count, truediv, get_case) + yield from run_edge_cases(dut, count, truediv, get_case) + if __name__ == '__main__': dut = FPDIV(width=64)