From: Christophe Lyon <christophe.lyon@linaro.org>
Date: Wed, 10 Jan 2018 15:34:33 +0000 (+0000)
Subject: [ARM] Add -mbranch-cost option, and update a few tests
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=227e57986a52f7aba4fbc819eec4b64ae2a9776f;p=gcc.git

[ARM] Add -mbranch-cost option, and update a few tests

2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	* config/arm/arm.opt (-mbranch-cost): New option.
	* config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
	account.

	gcc/testsuite/
	* lib/target-supports.exp (check_effective_target_branch_cost):
	New function.
	* gcc.dg/builtin-bswap-7.c: Use branch_cost effective target.
	* gcc.dg/pr21643.c: Likewise.
	* gcc.dg/pr46309.c: Likewise.
	* gcc.dg/tree-ssa/phi-opt-11.c: Likewise.
	* gcc.dg/tree-ssa/phi-opt-2.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-32.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-33.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-34.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-35.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-36.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-13.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise.

From-SVN: r256434
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8b5bda301ca..a7b22a83fcf 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	* config/arm/arm.opt (-mbranch-cost): New option.
+	* config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
+	account.
+
 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
 
 	PR target/83629
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 536f36f01bc..bd736423204 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1899,8 +1899,9 @@ enum arm_auto_incmodes
 
 /* Try to generate sequences that don't involve branches, we can then use
    conditional instructions.  */
-#define BRANCH_COST(speed_p, predictable_p) \
-  (current_tune->branch_cost (speed_p, predictable_p))
+#define BRANCH_COST(speed_p, predictable_p)			\
+  ((arm_branch_cost != -1) ? arm_branch_cost :			\
+   (current_tune->branch_cost (speed_p, predictable_p)))
 
 /* False if short circuit operation is preferred.  */
 #define LOGICAL_OP_NON_SHORT_CIRCUIT					\
diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
index def35d75034..a1286a4a861 100644
--- a/gcc/config/arm/arm.opt
+++ b/gcc/config/arm/arm.opt
@@ -298,3 +298,7 @@ When linking for big-endian targets, generate a BE8 format image.
 mbe32
 Target Report RejectNegative Negative(mbe8) InverseMask(BE8)
 When linking for big-endian targets, generate a legacy BE32 format image.
+
+mbranch-cost=
+Target RejectNegative Joined UInteger Var(arm_branch_cost) Init(-1)
+Cost to assume for a branch insn.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 11266ff69ee..c6adde84866 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,25 @@
+2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	* lib/target-supports.exp (check_effective_target_branch_cost):
+	New function.
+	* gcc.dg/builtin-bswap-7.c: Use branch_cost effective target.
+	* gcc.dg/pr21643.c: Likewise.
+	* gcc.dg/pr46309.c: Likewise.
+	* gcc.dg/tree-ssa/phi-opt-11.c: Likewise.
+	* gcc.dg/tree-ssa/phi-opt-2.c: Likewise.
+	* gcc.dg/tree-ssa/reassoc-32.c: Likewise.
+	* gcc.dg/tree-ssa/reassoc-33.c: Likewise.
+	* gcc.dg/tree-ssa/reassoc-34.c: Likewise.
+	* gcc.dg/tree-ssa/reassoc-35.c: Likewise.
+	* gcc.dg/tree-ssa/reassoc-36.c: Likewise.
+	* gcc.dg/tree-ssa/ssa-ifcombine-13.c: Likewise.
+	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise.
+	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c: Likewise.
+	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c: Likewise.
+	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise.
+	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise.
+	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise.
+
 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
 
 	PR target/83629
diff --git a/gcc/testsuite/gcc.dg/builtin-bswap-7.c b/gcc/testsuite/gcc.dg/builtin-bswap-7.c
index 3e1718d906d..fe854416c40 100644
--- a/gcc/testsuite/gcc.dg/builtin-bswap-7.c
+++ b/gcc/testsuite/gcc.dg/builtin-bswap-7.c
@@ -5,7 +5,7 @@
 
 /* The branch cost setting prevents the return value from being
    calculated with arithmetic instead of doing a compare.  */
-/* { dg-additional-options "-mbranch-cost=0" { target s390x-*-* } } */
+/* { dg-additional-options "-mbranch-cost=0" { target branch_cost } } */
 
 #include <stdint.h>
 
diff --git a/gcc/testsuite/gcc.dg/pr21643.c b/gcc/testsuite/gcc.dg/pr21643.c
index bd76aa8091b..d981fbc8b3b 100644
--- a/gcc/testsuite/gcc.dg/pr21643.c
+++ b/gcc/testsuite/gcc.dg/pr21643.c
@@ -1,6 +1,7 @@
 /* PR tree-optimization/21643 */
 /* { dg-do compile } */
 /* { dg-options "-O2 -fdump-tree-reassoc1-details" } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int
 f1 (unsigned char c)
diff --git a/gcc/testsuite/gcc.dg/pr46309.c b/gcc/testsuite/gcc.dg/pr46309.c
index 68229cf61d9..c9645292c6f 100644
--- a/gcc/testsuite/gcc.dg/pr46309.c
+++ b/gcc/testsuite/gcc.dg/pr46309.c
@@ -4,7 +4,7 @@
 /* The transformation depends on BRANCH_COST being greater than 1
    (see the notes in the PR), so try to force that.  */
 /* { dg-additional-options "-mtune=octeon2" { target mips*-*-* } } */
-/* { dg-additional-options "-mbranch-cost=2" { target avr*-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int
 f1 (int a)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c
index cda3abf9ec5..20728fcacc5 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O1 -fdump-tree-optimized" } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int f(int a, int b, int c)
 {
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c
index 140812272b8..e0b26181038 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O1 -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=1" { target { i?86-*-* x86_64-*-* mips*-*-* s390*-*-* avr*-*-* } } } */
+/* { dg-additional-options "-mbranch-cost=1" { target branch_cost } } */
 
 _Bool f1(_Bool a, _Bool b)
 {
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c
index 3ac1fb6a4f6..b6ca8e2bb39 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 
 int test (int a, int b, int c)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
index 6811a42133e..5572df4ae24 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int test (int a, int b, int c)
 {
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
index 523654d26d4..9b45f1cd9be 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int test (int a, int b, int c)
 {
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
index 216604ee714..9ee3abca04e 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int test (unsigned int a, int b, int c)
 {
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
index dbbf8a1c833..ac3a04291b7 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int test (int a, int b, int c)
 {
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c
index 7f4f011faee..5f3147a8c00 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O1 -fdump-tree-optimized-details-blocks" } */
-/* { dg-additional-options "-mbranch-cost=2" { target { i?86-*-* x86_64-*-* s390*-*-* avr*-*-* } } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 _Bool f1(_Bool a, _Bool b)
 {
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c
index acfcb7d12a3..1714fcf97c0 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int t (int a, int b)
 {
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c
index 0435d559ac6..f35ec5edac2 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int t (int a, int b)
 {
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c
index 4f2b57046a4..d84bdd51c74 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int t (int a, int b)
 {
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c
index 9c64b5ec96f..be0ee264e35 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int t (int a, int b)
 {
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c
index 8cd4a60e425..09c22abb071 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int t (int a, int b, int c)
 {
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c
index c161b16a247..a0dc82db156 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int t (int a, int b, int c)
 {
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 3c3ece59a2d..7de961b45e1 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8595,6 +8595,24 @@ proc check_effective_target_logical_op_short_circuit {} {
     return 0
 }
 
+# Return 1 if the target supports -mbranch-cost=N option.
+
+proc check_effective_target_branch_cost {} {
+    if { [   istarget arm*-*-*]
+	 || [istarget avr*-*-*]
+	 || [istarget epiphany*-*-*]
+	 || [istarget frv*-*-*]
+	 || [istarget i?86-*-linux*] || [istarget x86_64-*-linux*]
+	 || [istarget mips*-*-*]
+	 || [istarget s390*-*-*]
+	 || [istarget riscv*-*-*]
+	 || [istarget sh*-*-*]
+	 || [istarget spu*-*-*] } {
+	return 1
+    }
+    return 0
+}
+
 # Record that dg-final test TEST requires convential compilation.
 
 proc force_conventional_output_for { test } {