From: Tom Stellard Date: Thu, 23 Aug 2012 19:28:50 +0000 (+0000) Subject: radeon/llvm: Pull changes from external version of the backend X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=228a6641ccddaf24a993f827af1e97379785985a;p=mesa.git radeon/llvm: Pull changes from external version of the backend --- diff --git a/src/gallium/drivers/radeon/AMDGPUISelLowering.h b/src/gallium/drivers/radeon/AMDGPUISelLowering.h index cd2f0c0789a..4c100da9690 100644 --- a/src/gallium/drivers/radeon/AMDGPUISelLowering.h +++ b/src/gallium/drivers/radeon/AMDGPUISelLowering.h @@ -31,7 +31,7 @@ protected: /// CreateLiveInRegister - Helper function that adds Reg to the LiveIn list /// of the DAG's MachineFunction. This returns a Register SDNode representing - /// Reg. + /// Reg. SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC, unsigned Reg, EVT VT) const; diff --git a/src/gallium/drivers/radeon/AMDIL7XXDevice.cpp b/src/gallium/drivers/radeon/AMDIL7XXDevice.cpp index 37b7695c2c5..8561f0b3175 100644 --- a/src/gallium/drivers/radeon/AMDIL7XXDevice.cpp +++ b/src/gallium/drivers/radeon/AMDIL7XXDevice.cpp @@ -8,9 +8,6 @@ //==-----------------------------------------------------------------------===// #include "AMDIL7XXDevice.h" #include "AMDGPUSubtarget.h" -#ifdef UPSTREAM_LLVM -#include "AMDIL7XXAsmPrinter.h" -#endif #include "AMDILDevice.h" using namespace llvm; @@ -92,16 +89,6 @@ uint32_t AMDGPU7XXDevice::getMaxNumUAVs() const return 1; } -AsmPrinter* -AMDGPU7XXDevice::getAsmPrinter(TargetMachine& TM, MCStreamer &Streamer) const -{ -#ifdef UPSTREAM_LLVM - return new AMDGPU7XXAsmPrinter(TM, Streamer); -#else - return NULL; -#endif -} - AMDGPU770Device::AMDGPU770Device(AMDGPUSubtarget *ST): AMDGPU7XXDevice(ST) { setCaps(); diff --git a/src/gallium/drivers/radeon/AMDIL7XXDevice.h b/src/gallium/drivers/radeon/AMDIL7XXDevice.h index bf3f82cc26e..e848e2e0f2c 100644 --- a/src/gallium/drivers/radeon/AMDIL7XXDevice.h +++ b/src/gallium/drivers/radeon/AMDIL7XXDevice.h @@ -38,8 +38,6 @@ public: virtual uint32_t getGeneration() const; virtual uint32_t getResourceID(uint32_t DeviceID) const; virtual uint32_t getMaxNumUAVs() const; - AsmPrinter* - getAsmPrinter(TargetMachine& TM, MCStreamer &Streamer) const; protected: virtual void setCaps(); diff --git a/src/gallium/drivers/radeon/AMDILDevice.h b/src/gallium/drivers/radeon/AMDILDevice.h index a7528ad0b14..864fa0a3455 100644 --- a/src/gallium/drivers/radeon/AMDILDevice.h +++ b/src/gallium/drivers/radeon/AMDILDevice.h @@ -21,9 +21,6 @@ namespace llvm { class AMDGPUSubtarget; - class AMDGPUAsmPrinter; - class AMDGPUPointerManager; - class AsmPrinter; class MCStreamer; //===----------------------------------------------------------------------===// // Interface for data that is specific to a single device @@ -84,10 +81,6 @@ public: // Get the max number of UAV's for this device. virtual uint32_t getMaxNumUAVs() const = 0; - // Interface to get the Asm printer for each device. - virtual AsmPrinter* - getAsmPrinter(TargetMachine& TM, MCStreamer &Streamer) const = 0; - // API utilizing more detailed capabilities of each family of // cards. If a capability is supported, then either usesHardware or // usesSoftware returned true. If usesHardware returned true, then diff --git a/src/gallium/drivers/radeon/AMDILEvergreenDevice.cpp b/src/gallium/drivers/radeon/AMDILEvergreenDevice.cpp index d5c9148b169..3532a28fe0f 100644 --- a/src/gallium/drivers/radeon/AMDILEvergreenDevice.cpp +++ b/src/gallium/drivers/radeon/AMDILEvergreenDevice.cpp @@ -7,9 +7,6 @@ // //==-----------------------------------------------------------------------===// #include "AMDILEvergreenDevice.h" -#ifdef UPSTREAM_LLVM -#include "AMDILEGAsmPrinter.h" -#endif using namespace llvm; @@ -122,16 +119,6 @@ void AMDGPUEvergreenDevice::setCaps() { mHWBits.set(AMDGPUDeviceInfo::TmrReg); } -AsmPrinter* -AMDGPUEvergreenDevice::getAsmPrinter(TargetMachine& TM, MCStreamer &Streamer) const -{ -#ifdef UPSTREAM_LLVM - return new AMDGPUEGAsmPrinter(TM, Streamer); -#else - return NULL; -#endif -} - AMDGPUCypressDevice::AMDGPUCypressDevice(AMDGPUSubtarget *ST) : AMDGPUEvergreenDevice(ST) { setCaps(); diff --git a/src/gallium/drivers/radeon/AMDILEvergreenDevice.h b/src/gallium/drivers/radeon/AMDILEvergreenDevice.h index 3409065a8e2..cde1472f934 100644 --- a/src/gallium/drivers/radeon/AMDILEvergreenDevice.h +++ b/src/gallium/drivers/radeon/AMDILEvergreenDevice.h @@ -40,8 +40,6 @@ public: virtual uint32_t getGeneration() const; virtual uint32_t getMaxNumUAVs() const; virtual uint32_t getResourceID(uint32_t) const; - virtual AsmPrinter* - getAsmPrinter(TargetMachine& TM, MCStreamer &Streamer) const; protected: virtual void setCaps(); }; // AMDGPUEvergreenDevice diff --git a/src/gallium/drivers/radeon/AMDILIntrinsicInfo.cpp b/src/gallium/drivers/radeon/AMDILIntrinsicInfo.cpp index 1b1cd02894d..23df3822a5a 100644 --- a/src/gallium/drivers/radeon/AMDILIntrinsicInfo.cpp +++ b/src/gallium/drivers/radeon/AMDILIntrinsicInfo.cpp @@ -25,7 +25,7 @@ using namespace llvm; #undef GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN AMDGPUIntrinsicInfo::AMDGPUIntrinsicInfo(TargetMachine *tm) - : TargetIntrinsicInfo(), mTM(tm) + : TargetIntrinsicInfo() { } diff --git a/src/gallium/drivers/radeon/AMDILIntrinsicInfo.h b/src/gallium/drivers/radeon/AMDILIntrinsicInfo.h index e4b4473e376..9ae3d4dc112 100644 --- a/src/gallium/drivers/radeon/AMDILIntrinsicInfo.h +++ b/src/gallium/drivers/radeon/AMDILIntrinsicInfo.h @@ -31,7 +31,6 @@ namespace llvm { class AMDGPUIntrinsicInfo : public TargetIntrinsicInfo { - TargetMachine *mTM; public: AMDGPUIntrinsicInfo(TargetMachine *tm); std::string getName(unsigned int IntrId, Type **Tys = 0, diff --git a/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUAsmBackend.cpp b/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUAsmBackend.cpp index 10bf5a39366..5b31bc6c8f0 100644 --- a/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUAsmBackend.cpp +++ b/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUAsmBackend.cpp @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// -#include "MCTargetDesc/AMDILMCTargetDesc.h" +#include "MCTargetDesc/AMDGPUMCTargetDesc.h" #include "llvm/ADT/StringRef.h" #include "llvm/MC/MCAsmBackend.h" #include "llvm/MC/MCAssembler.h" diff --git a/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUMCAsmInfo.cpp b/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUMCAsmInfo.cpp new file mode 100644 index 00000000000..4fdd4835ed7 --- /dev/null +++ b/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUMCAsmInfo.cpp @@ -0,0 +1,103 @@ +//===-- MCTargetDesc/AMDGPUMCAsmInfo.cpp - TODO: Add brief description -------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// TODO: Add full description +// +//===----------------------------------------------------------------------===// + +#include "AMDGPUMCAsmInfo.h" +#ifndef NULL +#define NULL 0 +#endif + +using namespace llvm; +AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Target &T, StringRef &TT) : MCAsmInfo() +{ + HasSingleParameterDotFile = false; + WeakDefDirective = NULL; + //===------------------------------------------------------------------===// + HasSubsectionsViaSymbols = true; + HasMachoZeroFillDirective = false; + HasMachoTBSSDirective = false; + HasStaticCtorDtorReferenceInStaticMode = false; + LinkerRequiresNonEmptyDwarfLines = true; + MaxInstLength = 16; + PCSymbol = "$"; + SeparatorString = "\n"; + CommentColumn = 40; + CommentString = ";"; + LabelSuffix = ":"; + GlobalPrefix = "@"; + PrivateGlobalPrefix = ";."; + LinkerPrivateGlobalPrefix = "!"; + InlineAsmStart = ";#ASMSTART"; + InlineAsmEnd = ";#ASMEND"; + AssemblerDialect = 0; + AllowQuotesInName = false; + AllowNameToStartWithDigit = false; + AllowPeriodsInName = false; + + //===--- Data Emission Directives -------------------------------------===// + ZeroDirective = ".zero"; + AsciiDirective = ".ascii\t"; + AscizDirective = ".asciz\t"; + Data8bitsDirective = ".byte\t"; + Data16bitsDirective = ".short\t"; + Data32bitsDirective = ".long\t"; + Data64bitsDirective = ".quad\t"; + GPRel32Directive = NULL; + SunStyleELFSectionSwitchSyntax = true; + UsesELFSectionDirectiveForBSS = true; + HasMicrosoftFastStdCallMangling = false; + + //===--- Alignment Information ----------------------------------------===// + AlignDirective = ".align\t"; + AlignmentIsInBytes = true; + TextAlignFillValue = 0; + + //===--- Global Variable Emission Directives --------------------------===// + GlobalDirective = ".global"; + ExternDirective = ".extern"; + HasSetDirective = false; + HasAggressiveSymbolFolding = true; + LCOMMDirectiveType = LCOMM::None; + COMMDirectiveAlignmentIsInBytes = false; + HasDotTypeDotSizeDirective = false; + HasNoDeadStrip = true; + HasSymbolResolver = false; + WeakRefDirective = ".weakref\t"; + LinkOnceDirective = NULL; + //===--- Dwarf Emission Directives -----------------------------------===// + HasLEB128 = true; + SupportsDebugInformation = true; + ExceptionsType = ExceptionHandling::None; + DwarfUsesInlineInfoSection = false; + DwarfSectionOffsetDirective = ".offset"; + DwarfUsesLabelOffsetForRanges = true; + + //===--- CBE Asm Translation Table -----------------------------------===// + AsmTransCBE = NULL; +} +const char* +AMDGPUMCAsmInfo::getDataASDirective(unsigned int Size, unsigned int AS) const +{ + switch (AS) { + default: + return NULL; + case 0: + return NULL; + }; + return NULL; +} + +const MCSection* +AMDGPUMCAsmInfo::getNonexecutableStackSection(MCContext &CTX) const +{ + return NULL; +} diff --git a/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUMCAsmInfo.h b/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUMCAsmInfo.h new file mode 100644 index 00000000000..0ca264beb0f --- /dev/null +++ b/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUMCAsmInfo.h @@ -0,0 +1,30 @@ +//===-- MCTargetDesc/AMDGPUMCAsmInfo.h - TODO: Add brief description -------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// TODO: Add full description +// +//===----------------------------------------------------------------------===// + +#ifndef AMDGPUMCASMINFO_H_ +#define AMDGPUMCASMINFO_H_ + +#include "llvm/MC/MCAsmInfo.h" +namespace llvm { + class Target; + class StringRef; + + class AMDGPUMCAsmInfo : public MCAsmInfo { + public: + explicit AMDGPUMCAsmInfo(const Target &T, StringRef &TT); + const char* + getDataASDirective(unsigned int Size, unsigned int AS) const; + const MCSection* getNonexecutableStackSection(MCContext &CTX) const; + }; +} // namespace llvm +#endif // AMDGPUMCASMINFO_H_ diff --git a/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUMCTargetDesc.cpp b/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUMCTargetDesc.cpp new file mode 100644 index 00000000000..523b4da506a --- /dev/null +++ b/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUMCTargetDesc.cpp @@ -0,0 +1,98 @@ +#include "AMDGPUMCTargetDesc.h" +#include "AMDGPUMCAsmInfo.h" +#include "InstPrinter/AMDGPUInstPrinter.h" +#include "llvm/MC/MachineLocation.h" +#include "llvm/MC/MCCodeGenInfo.h" +#include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/TargetRegistry.h" + +#define GET_INSTRINFO_MC_DESC +#include "AMDGPUGenInstrInfo.inc" + +#define GET_SUBTARGETINFO_MC_DESC +#include "AMDGPUGenSubtargetInfo.inc" + +#define GET_REGINFO_MC_DESC +#include "AMDGPUGenRegisterInfo.inc" + +using namespace llvm; + +static MCInstrInfo *createAMDGPUMCInstrInfo() { + MCInstrInfo *X = new MCInstrInfo(); + InitAMDGPUMCInstrInfo(X); + return X; +} + +static MCRegisterInfo *createAMDGPUMCRegisterInfo(StringRef TT) { + MCRegisterInfo *X = new MCRegisterInfo(); + InitAMDGPUMCRegisterInfo(X, 0); + return X; +} + +static MCSubtargetInfo *createAMDGPUMCSubtargetInfo(StringRef TT, StringRef CPU, + StringRef FS) { + MCSubtargetInfo * X = new MCSubtargetInfo(); + InitAMDGPUMCSubtargetInfo(X, TT, CPU, FS); + return X; +} + +static MCCodeGenInfo *createAMDGPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, + CodeModel::Model CM, + CodeGenOpt::Level OL) { + MCCodeGenInfo *X = new MCCodeGenInfo(); + X->InitMCCodeGenInfo(RM, CM, OL); + return X; +} + +static MCInstPrinter *createAMDGPUMCInstPrinter(const Target &T, + unsigned SyntaxVariant, + const MCAsmInfo &MAI, + const MCInstrInfo &MII, + const MCRegisterInfo &MRI, + const MCSubtargetInfo &STI) { + return new AMDGPUInstPrinter(MAI, MII, MRI); +} + +static MCCodeEmitter *createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII, + const MCSubtargetInfo &STI, + MCContext &Ctx) { + if (STI.getFeatureBits() & AMDGPU::Feature64BitPtr) { + return createSIMCCodeEmitter(MCII, STI, Ctx); + } else { + return createR600MCCodeEmitter(MCII, STI, Ctx); + } +} + +static MCStreamer *createMCStreamer(const Target &T, StringRef TT, + MCContext &Ctx, MCAsmBackend &MAB, + raw_ostream &_OS, + MCCodeEmitter *_Emitter, + bool RelaxAll, + bool NoExecStack) { + return createPureStreamer(Ctx, MAB, _OS, _Emitter); +} + +extern "C" void LLVMInitializeAMDGPUTargetMC() { + + RegisterMCAsmInfo Y(TheAMDGPUTarget); + + TargetRegistry::RegisterMCCodeGenInfo(TheAMDGPUTarget, createAMDGPUMCCodeGenInfo); + + TargetRegistry::RegisterMCInstrInfo(TheAMDGPUTarget, createAMDGPUMCInstrInfo); + + TargetRegistry::RegisterMCRegInfo(TheAMDGPUTarget, createAMDGPUMCRegisterInfo); + + TargetRegistry::RegisterMCSubtargetInfo(TheAMDGPUTarget, createAMDGPUMCSubtargetInfo); + + TargetRegistry::RegisterMCInstPrinter(TheAMDGPUTarget, createAMDGPUMCInstPrinter); + + TargetRegistry::RegisterMCCodeEmitter(TheAMDGPUTarget, createAMDGPUMCCodeEmitter); + + TargetRegistry::RegisterMCAsmBackend(TheAMDGPUTarget, createAMDGPUAsmBackend); + + TargetRegistry::RegisterMCObjectStreamer(TheAMDGPUTarget, createMCStreamer); +} diff --git a/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUMCTargetDesc.h b/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUMCTargetDesc.h new file mode 100644 index 00000000000..328e367401a --- /dev/null +++ b/src/gallium/drivers/radeon/MCTargetDesc/AMDGPUMCTargetDesc.h @@ -0,0 +1,51 @@ +//===-- AMDGPUMCTargetDesc.h - AMDGPU Target Descriptions -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides AMDGPU specific target descriptions. +// +//===----------------------------------------------------------------------===// +// + +#ifndef AMDGPUMCTARGETDESC_H +#define AMDGPUMCTARGETDESC_H + +#include "llvm/ADT/StringRef.h" + +namespace llvm { +class MCAsmBackend; +class MCCodeEmitter; +class MCContext; +class MCInstrInfo; +class MCRegisterInfo; +class MCSubtargetInfo; +class Target; + +extern Target TheAMDGPUTarget; + +MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII, + const MCSubtargetInfo &STI, + MCContext &Ctx); + +MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII, + const MCSubtargetInfo &STI, + MCContext &Ctx); + +MCAsmBackend *createAMDGPUAsmBackend(const Target &T, StringRef TT); +} // End llvm namespace + +#define GET_REGINFO_ENUM +#include "AMDGPUGenRegisterInfo.inc" + +#define GET_INSTRINFO_ENUM +#include "AMDGPUGenInstrInfo.inc" + +#define GET_SUBTARGETINFO_ENUM +#include "AMDGPUGenSubtargetInfo.inc" + +#endif // AMDGPUMCTARGETDESC_H diff --git a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCAsmInfo.cpp b/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCAsmInfo.cpp deleted file mode 100644 index 1f3e4e7c0d4..00000000000 --- a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCAsmInfo.cpp +++ /dev/null @@ -1,103 +0,0 @@ -//===-- MCTargetDesc/AMDILMCAsmInfo.cpp - TODO: Add brief description -------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// TODO: Add full description -// -//===----------------------------------------------------------------------===// - -#include "AMDILMCAsmInfo.h" -#ifndef NULL -#define NULL 0 -#endif - -using namespace llvm; -AMDILMCAsmInfo::AMDILMCAsmInfo(const Target &T, StringRef &TT) : MCAsmInfo() -{ - HasSingleParameterDotFile = false; - WeakDefDirective = NULL; - //===------------------------------------------------------------------===// - HasSubsectionsViaSymbols = true; - HasMachoZeroFillDirective = false; - HasMachoTBSSDirective = false; - HasStaticCtorDtorReferenceInStaticMode = false; - LinkerRequiresNonEmptyDwarfLines = true; - MaxInstLength = 16; - PCSymbol = "$"; - SeparatorString = "\n"; - CommentColumn = 40; - CommentString = ";"; - LabelSuffix = ":"; - GlobalPrefix = "@"; - PrivateGlobalPrefix = ";."; - LinkerPrivateGlobalPrefix = "!"; - InlineAsmStart = ";#ASMSTART"; - InlineAsmEnd = ";#ASMEND"; - AssemblerDialect = 0; - AllowQuotesInName = false; - AllowNameToStartWithDigit = false; - AllowPeriodsInName = false; - - //===--- Data Emission Directives -------------------------------------===// - ZeroDirective = ".zero"; - AsciiDirective = ".ascii\t"; - AscizDirective = ".asciz\t"; - Data8bitsDirective = ".byte\t"; - Data16bitsDirective = ".short\t"; - Data32bitsDirective = ".long\t"; - Data64bitsDirective = ".quad\t"; - GPRel32Directive = NULL; - SunStyleELFSectionSwitchSyntax = true; - UsesELFSectionDirectiveForBSS = true; - HasMicrosoftFastStdCallMangling = false; - - //===--- Alignment Information ----------------------------------------===// - AlignDirective = ".align\t"; - AlignmentIsInBytes = true; - TextAlignFillValue = 0; - - //===--- Global Variable Emission Directives --------------------------===// - GlobalDirective = ".global"; - ExternDirective = ".extern"; - HasSetDirective = false; - HasAggressiveSymbolFolding = true; - LCOMMDirectiveType = LCOMM::None; - COMMDirectiveAlignmentIsInBytes = false; - HasDotTypeDotSizeDirective = false; - HasNoDeadStrip = true; - HasSymbolResolver = false; - WeakRefDirective = ".weakref\t"; - LinkOnceDirective = NULL; - //===--- Dwarf Emission Directives -----------------------------------===// - HasLEB128 = true; - SupportsDebugInformation = true; - ExceptionsType = ExceptionHandling::None; - DwarfUsesInlineInfoSection = false; - DwarfSectionOffsetDirective = ".offset"; - DwarfUsesLabelOffsetForRanges = true; - - //===--- CBE Asm Translation Table -----------------------------------===// - AsmTransCBE = NULL; -} -const char* -AMDILMCAsmInfo::getDataASDirective(unsigned int Size, unsigned int AS) const -{ - switch (AS) { - default: - return NULL; - case 0: - return NULL; - }; - return NULL; -} - -const MCSection* -AMDILMCAsmInfo::getNonexecutableStackSection(MCContext &CTX) const -{ - return NULL; -} diff --git a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCAsmInfo.h b/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCAsmInfo.h deleted file mode 100644 index d354b03351c..00000000000 --- a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCAsmInfo.h +++ /dev/null @@ -1,30 +0,0 @@ -//===-- MCTargetDesc/AMDILMCAsmInfo.h - TODO: Add brief description -------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// TODO: Add full description -// -//===----------------------------------------------------------------------===// - -#ifndef AMDILMCASMINFO_H_ -#define AMDILMCASMINFO_H_ - -#include "llvm/MC/MCAsmInfo.h" -namespace llvm { - class Target; - class StringRef; - - class AMDILMCAsmInfo : public MCAsmInfo { - public: - explicit AMDILMCAsmInfo(const Target &T, StringRef &TT); - const char* - getDataASDirective(unsigned int Size, unsigned int AS) const; - const MCSection* getNonexecutableStackSection(MCContext &CTX) const; - }; -} // namespace llvm -#endif // AMDILMCASMINFO_H_ diff --git a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp b/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp deleted file mode 100644 index bb447359a7a..00000000000 --- a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp +++ /dev/null @@ -1,98 +0,0 @@ -#include "AMDILMCTargetDesc.h" -#include "AMDILMCAsmInfo.h" -#include "InstPrinter/AMDGPUInstPrinter.h" -#include "llvm/MC/MachineLocation.h" -#include "llvm/MC/MCCodeGenInfo.h" -#include "llvm/MC/MCInstrInfo.h" -#include "llvm/MC/MCRegisterInfo.h" -#include "llvm/MC/MCStreamer.h" -#include "llvm/MC/MCSubtargetInfo.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/TargetRegistry.h" - -#define GET_INSTRINFO_MC_DESC -#include "AMDGPUGenInstrInfo.inc" - -#define GET_SUBTARGETINFO_MC_DESC -#include "AMDGPUGenSubtargetInfo.inc" - -#define GET_REGINFO_MC_DESC -#include "AMDGPUGenRegisterInfo.inc" - -using namespace llvm; - -static MCInstrInfo *createAMDGPUMCInstrInfo() { - MCInstrInfo *X = new MCInstrInfo(); - InitAMDGPUMCInstrInfo(X); - return X; -} - -static MCRegisterInfo *createAMDGPUMCRegisterInfo(StringRef TT) { - MCRegisterInfo *X = new MCRegisterInfo(); - InitAMDGPUMCRegisterInfo(X, 0); - return X; -} - -static MCSubtargetInfo *createAMDGPUMCSubtargetInfo(StringRef TT, StringRef CPU, - StringRef FS) { - MCSubtargetInfo * X = new MCSubtargetInfo(); - InitAMDGPUMCSubtargetInfo(X, TT, CPU, FS); - return X; -} - -static MCCodeGenInfo *createAMDGPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, - CodeModel::Model CM, - CodeGenOpt::Level OL) { - MCCodeGenInfo *X = new MCCodeGenInfo(); - X->InitMCCodeGenInfo(RM, CM, OL); - return X; -} - -static MCInstPrinter *createAMDGPUMCInstPrinter(const Target &T, - unsigned SyntaxVariant, - const MCAsmInfo &MAI, - const MCInstrInfo &MII, - const MCRegisterInfo &MRI, - const MCSubtargetInfo &STI) { - return new AMDGPUInstPrinter(MAI, MII, MRI); -} - -static MCCodeEmitter *createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII, - const MCSubtargetInfo &STI, - MCContext &Ctx) { - if (STI.getFeatureBits() & AMDGPU::Feature64BitPtr) { - return createSIMCCodeEmitter(MCII, STI, Ctx); - } else { - return createR600MCCodeEmitter(MCII, STI, Ctx); - } -} - -static MCStreamer *createMCStreamer(const Target &T, StringRef TT, - MCContext &Ctx, MCAsmBackend &MAB, - raw_ostream &_OS, - MCCodeEmitter *_Emitter, - bool RelaxAll, - bool NoExecStack) { - return createPureStreamer(Ctx, MAB, _OS, _Emitter); -} - -extern "C" void LLVMInitializeAMDGPUTargetMC() { - - RegisterMCAsmInfo Y(TheAMDGPUTarget); - - TargetRegistry::RegisterMCCodeGenInfo(TheAMDGPUTarget, createAMDGPUMCCodeGenInfo); - - TargetRegistry::RegisterMCInstrInfo(TheAMDGPUTarget, createAMDGPUMCInstrInfo); - - TargetRegistry::RegisterMCRegInfo(TheAMDGPUTarget, createAMDGPUMCRegisterInfo); - - TargetRegistry::RegisterMCSubtargetInfo(TheAMDGPUTarget, createAMDGPUMCSubtargetInfo); - - TargetRegistry::RegisterMCInstPrinter(TheAMDGPUTarget, createAMDGPUMCInstPrinter); - - TargetRegistry::RegisterMCCodeEmitter(TheAMDGPUTarget, createAMDGPUMCCodeEmitter); - - TargetRegistry::RegisterMCAsmBackend(TheAMDGPUTarget, createAMDGPUAsmBackend); - - TargetRegistry::RegisterMCObjectStreamer(TheAMDGPUTarget, createMCStreamer); -} diff --git a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.h b/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.h deleted file mode 100644 index 3ff5daf8b61..00000000000 --- a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.h +++ /dev/null @@ -1,51 +0,0 @@ -//===-- AMDILMCTargetDesc.h - AMDIL Target Descriptions -----*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file provides AMDIL specific target descriptions. -// -//===----------------------------------------------------------------------===// -// - -#ifndef AMDILMCTARGETDESC_H -#define AMDILMCTARGETDESC_H - -#include "llvm/ADT/StringRef.h" - -namespace llvm { -class MCAsmBackend; -class MCCodeEmitter; -class MCContext; -class MCInstrInfo; -class MCRegisterInfo; -class MCSubtargetInfo; -class Target; - -extern Target TheAMDGPUTarget; - -MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII, - const MCSubtargetInfo &STI, - MCContext &Ctx); - -MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII, - const MCSubtargetInfo &STI, - MCContext &Ctx); - -MCAsmBackend *createAMDGPUAsmBackend(const Target &T, StringRef TT); -} // End llvm namespace - -#define GET_REGINFO_ENUM -#include "AMDGPUGenRegisterInfo.inc" - -#define GET_INSTRINFO_ENUM -#include "AMDGPUGenInstrInfo.inc" - -#define GET_SUBTARGETINFO_ENUM -#include "AMDGPUGenSubtargetInfo.inc" - -#endif // AMDILMCTARGETDESC_H diff --git a/src/gallium/drivers/radeon/MCTargetDesc/R600MCCodeEmitter.cpp b/src/gallium/drivers/radeon/MCTargetDesc/R600MCCodeEmitter.cpp index 99db28be3ab..46360e3ccbd 100644 --- a/src/gallium/drivers/radeon/MCTargetDesc/R600MCCodeEmitter.cpp +++ b/src/gallium/drivers/radeon/MCTargetDesc/R600MCCodeEmitter.cpp @@ -17,7 +17,7 @@ //===----------------------------------------------------------------------===// #include "R600Defines.h" -#include "MCTargetDesc/AMDILMCTargetDesc.h" +#include "MCTargetDesc/AMDGPUMCTargetDesc.h" #include "MCTargetDesc/AMDGPUMCCodeEmitter.h" #include "llvm/MC/MCCodeEmitter.h" #include "llvm/MC/MCContext.h" diff --git a/src/gallium/drivers/radeon/MCTargetDesc/SIMCCodeEmitter.cpp b/src/gallium/drivers/radeon/MCTargetDesc/SIMCCodeEmitter.cpp index 3d923055a59..481e65bf7af 100644 --- a/src/gallium/drivers/radeon/MCTargetDesc/SIMCCodeEmitter.cpp +++ b/src/gallium/drivers/radeon/MCTargetDesc/SIMCCodeEmitter.cpp @@ -12,7 +12,7 @@ // //===----------------------------------------------------------------------===// -#include "MCTargetDesc/AMDILMCTargetDesc.h" +#include "MCTargetDesc/AMDGPUMCTargetDesc.h" #include "MCTargetDesc/AMDGPUMCCodeEmitter.h" #include "llvm/MC/MCCodeEmitter.h" #include "llvm/MC/MCContext.h" diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources index 4784fec7114..687acb3f420 100644 --- a/src/gallium/drivers/radeon/Makefile.sources +++ b/src/gallium/drivers/radeon/Makefile.sources @@ -49,12 +49,12 @@ CPP_SOURCES := \ SIMachineFunctionInfo.cpp \ SIRegisterInfo.cpp \ InstPrinter/AMDGPUInstPrinter.cpp \ - MCTargetDesc/AMDILMCAsmInfo.cpp \ + MCTargetDesc/AMDGPUMCAsmInfo.cpp \ MCTargetDesc/AMDGPUAsmBackend.cpp \ - MCTargetDesc/AMDILMCTargetDesc.cpp \ + MCTargetDesc/AMDGPUMCTargetDesc.cpp \ MCTargetDesc/SIMCCodeEmitter.cpp \ MCTargetDesc/R600MCCodeEmitter.cpp \ - TargetInfo/AMDILTargetInfo.cpp \ + TargetInfo/AMDGPUTargetInfo.cpp \ radeon_llvm_emit.cpp C_SOURCES := \ diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp index bf970a5e05d..f96887c0edb 100644 --- a/src/gallium/drivers/radeon/R600ISelLowering.cpp +++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp @@ -118,9 +118,9 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter( { // Convert to DWORD address unsigned NewAddr = MRI.createVirtualRegister( - AMDGPU::R600_TReg32_XRegisterClass); + &AMDGPU::R600_TReg32_XRegClass); unsigned ShiftValue = MRI.createVirtualRegister( - AMDGPU::R600_TReg32RegisterClass); + &AMDGPU::R600_TReg32RegClass); // XXX In theory, we should be able to pass ShiftValue directly to // the LSHR_eg instruction as an inline literal, but I tried doing it @@ -151,8 +151,8 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter( case AMDGPU::TXD: { - unsigned t0 = MRI.createVirtualRegister(AMDGPU::R600_Reg128RegisterClass); - unsigned t1 = MRI.createVirtualRegister(AMDGPU::R600_Reg128RegisterClass); + unsigned t0 = MRI.createVirtualRegister(&AMDGPU::R600_Reg128RegClass); + unsigned t1 = MRI.createVirtualRegister(&AMDGPU::R600_Reg128RegClass); BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SET_GRADIENTS_H), t0) .addOperand(MI->getOperand(3)) diff --git a/src/gallium/drivers/radeon/R600RegisterInfo.cpp b/src/gallium/drivers/radeon/R600RegisterInfo.cpp index c2e40c7214a..ef6bf878f6f 100644 --- a/src/gallium/drivers/radeon/R600RegisterInfo.cpp +++ b/src/gallium/drivers/radeon/R600RegisterInfo.cpp @@ -109,7 +109,7 @@ const TargetRegisterClass * R600RegisterInfo::getCFGStructurizerRegClass( { switch(VT.SimpleTy) { default: - case MVT::i32: return AMDGPU::R600_TReg32RegisterClass; + case MVT::i32: return &AMDGPU::R600_TReg32RegClass; } } diff --git a/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp b/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp index 79e099badd4..3ee03ae74c5 100644 --- a/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp +++ b/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp @@ -109,8 +109,8 @@ bool SIAssignInterpRegsPass::runOnMachineFunction(MachineFunction &MF) for (unsigned reg_idx = 0; reg_idx < InterpUse[interp_idx].reg_count; reg_idx++, used_vgprs++) { - unsigned new_reg = AMDGPU::VReg_32RegisterClass->getRegister(used_vgprs); - unsigned virt_reg = MRI.createVirtualRegister(AMDGPU::VReg_32RegisterClass); + unsigned new_reg = AMDGPU::VReg_32RegClass.getRegister(used_vgprs); + unsigned virt_reg = MRI.createVirtualRegister(&AMDGPU::VReg_32RegClass); MRI.replaceRegWith(InterpUse[interp_idx].regs[reg_idx], virt_reg); AddLiveIn(&MF, MRI, new_reg, virt_reg); } diff --git a/src/gallium/drivers/radeon/SIRegisterInfo.cpp b/src/gallium/drivers/radeon/SIRegisterInfo.cpp index 65e98089c90..8fe8ae584e2 100644 --- a/src/gallium/drivers/radeon/SIRegisterInfo.cpp +++ b/src/gallium/drivers/radeon/SIRegisterInfo.cpp @@ -54,7 +54,7 @@ const TargetRegisterClass * SIRegisterInfo::getCFGStructurizerRegClass( { switch(VT.SimpleTy) { default: - case MVT::i32: return AMDGPU::VReg_32RegisterClass; + case MVT::i32: return &AMDGPU::VReg_32RegClass; } } #include "SIRegisterGetHWRegNum.inc" diff --git a/src/gallium/drivers/radeon/TargetInfo/AMDGPUTargetInfo.cpp b/src/gallium/drivers/radeon/TargetInfo/AMDGPUTargetInfo.cpp new file mode 100644 index 00000000000..380e7deb280 --- /dev/null +++ b/src/gallium/drivers/radeon/TargetInfo/AMDGPUTargetInfo.cpp @@ -0,0 +1,26 @@ +//===-- TargetInfo/AMDGPUTargetInfo.cpp - TODO: Add brief description -------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// TODO: Add full description +// +//===----------------------------------------------------------------------===// + +#include "AMDGPU.h" +#include "llvm/Support/TargetRegistry.h" + +using namespace llvm; + +/// The target for the AMDGPU backend +Target llvm::TheAMDGPUTarget; + +/// Extern function to initialize the targets for the AMDGPU backend +extern "C" void LLVMInitializeAMDGPUTargetInfo() { + RegisterTarget + R600(TheAMDGPUTarget, "r600", "AMD GPUs HD2XXX-HD6XXX"); +} diff --git a/src/gallium/drivers/radeon/TargetInfo/AMDILTargetInfo.cpp b/src/gallium/drivers/radeon/TargetInfo/AMDILTargetInfo.cpp deleted file mode 100644 index 522f591e2ef..00000000000 --- a/src/gallium/drivers/radeon/TargetInfo/AMDILTargetInfo.cpp +++ /dev/null @@ -1,26 +0,0 @@ -//===-- TargetInfo/AMDILTargetInfo.cpp - TODO: Add brief description -------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// TODO: Add full description -// -//===----------------------------------------------------------------------===// - -#include "AMDIL.h" -#include "llvm/Support/TargetRegistry.h" - -using namespace llvm; - -/// The target for the AMDGPU backend -Target llvm::TheAMDGPUTarget; - -/// Extern function to initialize the targets for the AMDIL backend -extern "C" void LLVMInitializeAMDGPUTargetInfo() { - RegisterTarget - R600(TheAMDGPUTarget, "r600", "AMD GPUs HD2XXX-HD6XXX"); -}