From: Richard Kenner Date: Sat, 20 Jul 1996 13:17:10 +0000 (-0400) Subject: (INITIALIZE_TRAMPOLINE): Use `_flush_cache'; flush data cache too. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=22b54c57a1d3b30ebbfc9c34650e360753b5d591;p=gcc.git (INITIALIZE_TRAMPOLINE): Use `_flush_cache'; flush data cache too. From-SVN: r12541 --- diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 6c45d96f89f..be4efbe67cd 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2218,12 +2218,13 @@ typedef struct mips_args { emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 36)), CHAIN);\ } \ \ - /* Flush the instruction cache. */ \ + /* Flush both caches. We need to flush the data cache in case \ + the system has a write-back cache. */ \ /* ??? Should check the return value for errors. */ \ - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "cacheflush"), \ + emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "_flush_cache"), \ 0, VOIDmode, 3, addr, Pmode, \ GEN_INT (TRAMPOLINE_SIZE), TYPE_MODE (integer_type_node),\ - GEN_INT (1), TYPE_MODE (integer_type_node)); \ + GEN_INT (3), TYPE_MODE (integer_type_node)); \ } /* Addressing modes, and classification of registers for them. */