From: Luke Kenneth Casson Leighton Date: Sun, 27 Sep 2020 09:31:13 +0000 (+0100) Subject: add Makefile for creating ls180.il X-Git-Tag: 24jan2021_ls180~301 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=22ca76d4bcc173289594b4034475f2918200ce8d;p=soc.git add Makefile for creating ls180.il --- diff --git a/src/soc/litex/florent/Makefile b/src/soc/litex/florent/Makefile new file mode 100644 index 00000000..48937c30 --- /dev/null +++ b/src/soc/litex/florent/Makefile @@ -0,0 +1,9 @@ +ls180: + ./ls180soc.py --build --platform=ls180 + cp build/ls180/gateware/ls180.v . + cp build/ls180/gateware/mem.init . + cp libresoc/libresoc.v . + yosys -p 'read_verilog ls180.v; read_verilog libresoc.v; write_ilang ls180.il' + yosys -p 'read_verilog ls180.v' \ + -p 'read_verilog libresoc.v' \ + -p 'write_ilang ls180.il'