From: Uros Bizjak <uros@gcc.gnu.org>
Date: Sun, 1 Aug 2010 10:41:57 +0000 (+0200)
Subject: re PR target/45142 (split for *vec_set<mode>_0_sse2 incomplete)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=22db1fbca9fb5ec31b41180a8696ed5fef081c19;p=gcc.git

re PR target/45142 (split for *vec_set<mode>_0_sse2 incomplete)

	PR target/45142
	* config/i386/sse.md (vec_set<mode>_0): Do not set mode attribute for
	alternative 2.
	(vec_set<moode>_0 splitter): Use SSEMODE4S mode iterator to also
	split V4SI operands.

From-SVN: r162797
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e5fc835aad8..a60893aca17 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2010-08-01  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/45142
+	* config/i386/sse.md (vec_set<mode>_0): Do not set mode attribute for
+	alternative 2.
+	(vec_set<moode>_0 splitter): Use SSEMODE4S mode iterator to also
+	split V4SI operands.
+
 2010-08-01  Anatoly Sokolov  <aesok@post.ru>
 
 	* config/mmix/mmix.h (ASM_OUTPUT_SOURCE_FILENAME): Remove macro.
@@ -53,8 +61,7 @@
 	* config/alpha/alpha.c (alpha_handle_option): Handle -G.
 	* config/frv/frv.c (frv_handle_option): Handle -G.
 	* config/ia64/ia64.c (ia64_handle_option): Handle -G.
-	* config/lm32/lm32.c (lm32_handle_option, TARGET_HANDLE_OPTION):
-	New.
+	* config/lm32/lm32.c (lm32_handle_option, TARGET_HANDLE_OPTION): New.
 	* config/m32r/m32r.c (m32r_handle_option): Handle -G.
 	* config/mips/mips.c (mips_handle_option): Handle -G.
 	* config/rs6000/rs6000.c (rs6000_handle_option) Handle -G.
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 5ac0da875b6..b505c8ed4f5 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -4040,7 +4040,7 @@
    movss\t{%2, %0|%0, %2}
    #"
   [(set_attr "type" "ssemov")
-   (set_attr "mode" "SF")])
+   (set_attr "mode" "SF,SF,*")])
 
 ;; A subset is vec_setv4sf.
 (define_insn "*vec_setv4sf_avx"
@@ -4108,16 +4108,17 @@
    (set_attr "mode" "V4SF")])
 
 (define_split
-  [(set (match_operand:V4SF 0 "memory_operand" "")
-	(vec_merge:V4SF
-	  (vec_duplicate:V4SF
-	    (match_operand:SF 1 "nonmemory_operand" ""))
+  [(set (match_operand:SSEMODE4S 0 "memory_operand" "")
+	(vec_merge:SSEMODE4S
+	  (vec_duplicate:SSEMODE4S
+	    (match_operand:<ssescalarmode> 1 "nonmemory_operand" ""))
 	  (match_dup 0)
 	  (const_int 1)))]
   "TARGET_SSE && reload_completed"
   [(const_int 0)]
 {
-  emit_move_insn (adjust_address (operands[0], SFmode, 0), operands[1]);
+  emit_move_insn (adjust_address (operands[0], <ssescalarmode>mode, 0),
+		  operands[1]);
   DONE;
 })