From: Matt Turner Date: Thu, 31 May 2012 21:32:01 +0000 (+0000) Subject: 4600.md (r4600_imul_si): Rename from r4600_imul. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=22e834575d655b4f0d9b6af8d2e908014c570df7;p=gcc.git 4600.md (r4600_imul_si): Rename from r4600_imul. gcc/ 2012-02-24 Matt Turner * config/mips/4600.md (r4600_imul_si): Rename from r4600_imul. (r4600_imul_di): New. (r4600_idiv_si): Rename from r4600_idiv. (r4600_idiv_di): New. From-SVN: r188083 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c4e51320337..5202d7833ed 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2012-05-31 Matt Turner + + * config/mips/4600.md (r4600_imul_si): Rename from r4600_imul. + (r4600_imul_di): New. + (r4600_idiv_si): Rename from r4600_idiv. + (r4600_idiv_di): New. + 2012-05-31 Steven Bosscher * output.h (__gcc_host_wide_int__): Move to hwint.h. diff --git a/gcc/config/mips/4600.md b/gcc/config/mips/4600.md index c645cbc5d82..fcdbf00d261 100644 --- a/gcc/config/mips/4600.md +++ b/gcc/config/mips/4600.md @@ -1,5 +1,5 @@ ;; R4600 and R4650 pipeline description. -;; Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2004, 2005, 2007, 2012 Free Software Foundation, Inc. ;; ;; This file is part of GCC. @@ -24,16 +24,30 @@ ;; We handle the R4600 and R4650 in much the same way. The only difference ;; is in the integer multiplication and division costs. -(define_insn_reservation "r4600_imul" 10 +(define_insn_reservation "r4600_imul_si" 10 (and (eq_attr "cpu" "r4600") - (eq_attr "type" "imul,imul3,imadd")) + (eq_attr "type" "imul,imul3,imadd") + (eq_attr "mode" "SI")) "imuldiv*10") -(define_insn_reservation "r4600_idiv" 42 +(define_insn_reservation "r4600_imul_di" 12 (and (eq_attr "cpu" "r4600") - (eq_attr "type" "idiv")) + (eq_attr "type" "imul,imul3,imadd") + (eq_attr "mode" "DI")) + "imuldiv*12") + +(define_insn_reservation "r4600_idiv_si" 42 + (and (eq_attr "cpu" "r4600") + (eq_attr "type" "idiv") + (eq_attr "mode" "SI")) "imuldiv*42") +(define_insn_reservation "r4600_idiv_di" 74 + (and (eq_attr "cpu" "r4600") + (eq_attr "type" "idiv") + (eq_attr "mode" "DI")) + "imuldiv*74") + (define_insn_reservation "r4650_imul" 4 (and (eq_attr "cpu" "r4650")