From: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Date: Thu, 18 Jul 2019 23:54:24 +0000 (+0200)
Subject: radv: Generalize binning settings.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=22f2f76789dc67b6331090008cf93eb367cc2a9e;p=mesa.git

radv: Generalize binning settings.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
---

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 9aa81ebbbf5..6b28f3f1be3 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -3034,22 +3034,14 @@ radv_pipeline_generate_binning_state(struct radeon_cmdbuf *ctx_cs,
 		unsigned persistent_states_per_bin; /* allowed range: [1, 32] */
 		unsigned fpovs_per_batch; /* allowed range: [0, 255], 0 = unlimited */
 
-		switch (pipeline->device->physical_device->rad_info.family) {
-		case CHIP_VEGA10:
-		case CHIP_VEGA12:
-		case CHIP_VEGA20:
+		if (pipeline->device->physical_device->rad_info.has_dedicated_vram) {
 			context_states_per_bin = 1;
 			persistent_states_per_bin = 1;
 			fpovs_per_batch = 63;
-			break;
-		case CHIP_RAVEN:
-		case CHIP_RAVEN2:
+		} else {
 			context_states_per_bin = 6;
 			persistent_states_per_bin = 32;
 			fpovs_per_batch = 63;
-			break;
-		default:
-			unreachable("unhandled family while determining binning state.");
 		}
 
 		const uint32_t pa_sc_binner_cntl_0 =