From: Jean THOMAS <git0@pub.jeanthomas.me>
Date: Thu, 16 Jul 2020 13:22:22 +0000 (+0200)
Subject: Tweak yosys script
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=22f9f19db4be128d660d3aec2114ab794a655e67;p=gram.git

Tweak yosys script
---

diff --git a/gram/simulation/simsoc.ys b/gram/simulation/simsoc.ys
index ffec515..77e4c13 100644
--- a/gram/simulation/simsoc.ys
+++ b/gram/simulation/simsoc.ys
@@ -2,21 +2,17 @@ read_ilang build_simsoc/top.il
 delete w:$verilog_initial_trigger
 proc_prune
 proc_clean
+proc_rmdead
 proc_init
 proc_arst
+proc_dlatch
 proc_dff
 proc_rmdead
 proc_mux
 proc_clean
 pmuxtree
 memory_collect
-extract_fa -v
-clean
-flatten \ub
-flatten \decoder
-flatten \arbiter
-flatten \sysclk
-opt -fine -full
+extract_fa
 clean
 opt
 clean