From: Richard Sandiford <richard.sandiford@arm.com>
Date: Sun, 5 Jul 2015 08:02:59 +0000 (+0000)
Subject: target-insns.def (extv, [...]): New targetm instruction patterns.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=234d14ac72066f06b8da319f98793d0614cda8b0;p=gcc.git

target-insns.def (extv, [...]): New targetm instruction patterns.

gcc/
	* target-insns.def (extv, extzv, insv): New targetm instruction
	patterns.
	* optabs.c (get_extraction_insn): Use them instead of HAVE_*/gen_*
	interface.
	* recog.c (simplify_while_replacing): Likewise.

From-SVN: r225432
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3aa6ee1fddb..be4471c9331 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2015-07-05  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* target-insns.def (extv, extzv, insv): New targetm instruction
+	patterns.
+	* optabs.c (get_extraction_insn): Use them instead of HAVE_*/gen_*
+	interface.
+	* recog.c (simplify_while_replacing): Likewise.
+
 2015-07-05  Richard Sandiford  <richard.sandiford@arm.com>
 
 	* target-insns.def (doloop_begin, doloop_end): New targetm
diff --git a/gcc/optabs.c b/gcc/optabs.c
index 5c761457fe9..6818458a23d 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -8416,18 +8416,6 @@ expand_jump_insn (enum insn_code icode, unsigned int nops,
 }
 
 /* Reduce conditional compilation elsewhere.  */
-#ifndef HAVE_insv
-#define HAVE_insv	0
-#define CODE_FOR_insv	CODE_FOR_nothing
-#endif
-#ifndef HAVE_extv
-#define HAVE_extv	0
-#define CODE_FOR_extv	CODE_FOR_nothing
-#endif
-#ifndef HAVE_extzv
-#define HAVE_extzv	0
-#define CODE_FOR_extzv	CODE_FOR_nothing
-#endif
 
 /* Enumerates the possible types of structure operand to an
    extraction_insn.  */
@@ -8512,25 +8500,25 @@ get_extraction_insn (extraction_insn *insn,
   switch (pattern)
     {
     case EP_insv:
-      if (HAVE_insv
+      if (targetm.have_insv ()
 	  && get_traditional_extraction_insn (insn, type, mode,
-					      CODE_FOR_insv, 0, 3))
+					      targetm.code_for_insv, 0, 3))
 	return true;
       return get_optab_extraction_insn (insn, type, mode, insv_optab,
 					insvmisalign_optab, 2);
 
     case EP_extv:
-      if (HAVE_extv
+      if (targetm.have_extv ()
 	  && get_traditional_extraction_insn (insn, type, mode,
-					      CODE_FOR_extv, 1, 0))
+					      targetm.code_for_extv, 1, 0))
 	return true;
       return get_optab_extraction_insn (insn, type, mode, extv_optab,
 					extvmisalign_optab, 3);
 
     case EP_extzv:
-      if (HAVE_extzv
+      if (targetm.have_extzv ()
 	  && get_traditional_extraction_insn (insn, type, mode,
-					      CODE_FOR_extzv, 1, 0))
+					      targetm.code_for_extzv, 1, 0))
 	return true;
       return get_optab_extraction_insn (insn, type, mode, extzv_optab,
 					extzvmisalign_optab, 3);
diff --git a/gcc/recog.c b/gcc/recog.c
index 3fbfe076ed8..d96e2932098 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -566,15 +566,6 @@ cancel_changes (int num)
 }
 
 /* Reduce conditional compilation elsewhere.  */
-#ifndef HAVE_extv
-#define HAVE_extv	0
-#define CODE_FOR_extv	CODE_FOR_nothing
-#endif
-#ifndef HAVE_extzv
-#define HAVE_extzv	0
-#define CODE_FOR_extzv	CODE_FOR_nothing
-#endif
-
 /* A subroutine of validate_replace_rtx_1 that tries to simplify the resulting
    rtx.  */
 
@@ -690,15 +681,15 @@ simplify_while_replacing (rtx *loc, rtx to, rtx_insn *object,
 	  machine_mode is_mode = GET_MODE (XEXP (x, 0));
 	  int pos = INTVAL (XEXP (x, 2));
 
-	  if (GET_CODE (x) == ZERO_EXTRACT && HAVE_extzv)
+	  if (GET_CODE (x) == ZERO_EXTRACT && targetm.have_extzv ())
 	    {
-	      wanted_mode = insn_data[CODE_FOR_extzv].operand[1].mode;
+	      wanted_mode = insn_data[targetm.code_for_extzv].operand[1].mode;
 	      if (wanted_mode == VOIDmode)
 		wanted_mode = word_mode;
 	    }
-	  else if (GET_CODE (x) == SIGN_EXTRACT && HAVE_extv)
+	  else if (GET_CODE (x) == SIGN_EXTRACT && targetm.have_extv ())
 	    {
-	      wanted_mode = insn_data[CODE_FOR_extv].operand[1].mode;
+	      wanted_mode = insn_data[targetm.code_for_extv].operand[1].mode;
 	      if (wanted_mode == VOIDmode)
 		wanted_mode = word_mode;
 	    }
diff --git a/gcc/target-insns.def b/gcc/target-insns.def
index b5b249211e7..4f49ba6cf57 100644
--- a/gcc/target-insns.def
+++ b/gcc/target-insns.def
@@ -42,6 +42,9 @@ DEF_TARGET_INSN (doloop_begin, (rtx x0, rtx x1))
 DEF_TARGET_INSN (doloop_end, (rtx x0, rtx x1))
 DEF_TARGET_INSN (epilogue, (void))
 DEF_TARGET_INSN (exception_receiver, (void))
+DEF_TARGET_INSN (extv, (rtx x0, rtx x1, rtx x2, rtx x3))
+DEF_TARGET_INSN (extzv, (rtx x0, rtx x1, rtx x2, rtx x3))
+DEF_TARGET_INSN (insv, (rtx x0, rtx x1, rtx x2, rtx x3))
 DEF_TARGET_INSN (jump, (rtx x0))
 DEF_TARGET_INSN (load_multiple, (rtx x0, rtx x1, rtx x2))
 DEF_TARGET_INSN (mem_signal_fence, (rtx x0))