From: lkcl <lkcl@web>
Date: Thu, 19 Nov 2020 04:41:07 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~1721
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2369b6cb82d2265d4df597c13bcaeccc56569780;p=libreriscv.git

---

diff --git a/openpower/sv/16_bit_compressed.mdwn b/openpower/sv/16_bit_compressed.mdwn
index 923e79f36..6f5872e77 100644
--- a/openpower/sv/16_bit_compressed.mdwn
+++ b/openpower/sv/16_bit_compressed.mdwn
@@ -213,6 +213,8 @@ instruction counts from objdump on /bin/bash:
 
 Construction of immediate:
 
+* LD/ST r1 (SP) variants shoukd be offset by -256
+ see <https://bugs.libre-soc.org/show_bug.cgi?id=238#c43>
 * [1] not the same as v3.0B addis: the shift amount is smaller and actually
   still maps to within the v3.0B addi immediate range.
 * addi is EXTS(i2||imm) to give a 4-bit range -8 to +7