From: Andrew Zonenberg <azonenberg@drawersteak.com>
Date: Sat, 2 Apr 2016 04:18:29 +0000 (-0700)
Subject: Added GreenPak inverter support
X-Git-Tag: yosys-0.7~270^2~2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2386885f228ebecccf4987ac81bde11df56dae38;p=yosys.git

Added GreenPak inverter support
---

diff --git a/techlibs/greenpak4/cells_map.v b/techlibs/greenpak4/cells_map.v
index ce517d94b..1bc0bcda4 100644
--- a/techlibs/greenpak4/cells_map.v
+++ b/techlibs/greenpak4/cells_map.v
@@ -33,8 +33,13 @@ module \$lut (A, Y);
 
   generate
     if (WIDTH == 1) begin
-      GP_2LUT #(.INIT({2'b00, LUT})) _TECHMAP_REPLACE_ (.OUT(Y),
-      	.IN0(A[0]), .IN1(1'b0));
+		if(LUT == 2'b01) begin
+			GP_INV _TECHMAP_REPLACE_ (.OUT(Y), .IN(A[0]) );
+		end
+		else begin
+			GP_2LUT #(.INIT({2'b00, LUT})) _TECHMAP_REPLACE_ (.OUT(Y),
+				.IN0(A[0]), .IN1(1'b0));
+		end
     end else
     if (WIDTH == 2) begin
       GP_2LUT #(.INIT(LUT)) _TECHMAP_REPLACE_ (.OUT(Y),
diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v
index 2727d9246..4ea576960 100644
--- a/techlibs/greenpak4/cells_sim.v
+++ b/techlibs/greenpak4/cells_sim.v
@@ -40,6 +40,10 @@ module GP_DFFSR(input D, CLK, nSR, output reg Q);
 	end
 endmodule
 
+module GP_INV(input IN, output OUT);
+	assign OUT = ~IN;
+endmodule
+
 module GP_2LUT(input IN0, IN1, output OUT);
 	parameter [3:0] INIT = 0;
 	assign OUT = INIT[{IN1, IN0}];
diff --git a/techlibs/greenpak4/synth_greenpak4.cc b/techlibs/greenpak4/synth_greenpak4.cc
index 25150ec56..8900d8d78 100644
--- a/techlibs/greenpak4/synth_greenpak4.cc
+++ b/techlibs/greenpak4/synth_greenpak4.cc
@@ -207,8 +207,8 @@ struct SynthGreenPAK4Pass : public Pass {
 		if (check_label(active, run_from, run_to, "map_luts"))
 		{
 			if (part == "SLG46140V") Pass::call(design, "nlutmap -luts 0,6,8,2");
-			if (part == "SLG46620V") Pass::call(design, "nlutmap -luts 0,8,16,2");
-			if (part == "SLG46621V") Pass::call(design, "nlutmap -luts 0,8,16,2");
+			if (part == "SLG46620V") Pass::call(design, "nlutmap -luts 2,8,16,2");
+			if (part == "SLG46621V") Pass::call(design, "nlutmap -luts 2,8,16,2");
 			Pass::call(design, "clean");
 		}