From: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Date: Thu, 25 Jun 2015 08:18:19 +0000 (+0000)
Subject: re PR target/29693 (ICE while compiling gcc-3.4.3 with gcc-4.1.1)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=238a4dba309e8e2f37e1372a3fa56d295a43fa80;p=gcc.git

re PR target/29693 (ICE while compiling gcc-3.4.3 with gcc-4.1.1)

Fix PR target/29693



2015-06-25  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/29693
	* config/arm/arm.c (arm_dbx_register_number): Return
	DWARF_FRAME_REGISTERS by default.

From-SVN: r224932
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d60bd5fcbb3..9e37094678d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-06-25  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+	PR target/29693
+	* config/arm/arm.c (arm_dbx_register_number): Return
+	DWARF_FRAME_REGISTERS by default.
+
 2015-06-25  Tom de Vries  <tom@codesourcery.com>
 
 	* dominance.c (calculate_dominance_info): Fix verify_dominators call
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 09191e5d2c2..9f4e3950789 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -26389,7 +26389,7 @@ arm_dbx_register_number (unsigned int regno)
   if (IS_IWMMXT_REGNUM (regno))
     return 112 + regno - FIRST_IWMMXT_REGNUM;
 
-  gcc_unreachable ();
+  return DWARF_FRAME_REGISTERS;
 }
 
 /* Dwarf models VFPv3 registers as 32 64-bit registers.