From: Kazu Hirata <kazu@cs.umass.edu>
Date: Sun, 2 Mar 2003 13:40:25 +0000 (+0000)
Subject: h8300.md (zero_extendqisi2): Change to an expander.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=23cdb4657f2e5695011a12cd407f56b3dc937e14;p=gcc.git

h8300.md (zero_extendqisi2): Change to an expander.

	* config/h8300/h8300.md (zero_extendqisi2): Change to an
	expander.
	(*zero_extendqisi2_h8300): New.
	(*zero_extendqisi2_h8300hs): New.
	(two splitters): New.

From-SVN: r63660
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cef29a82fc1..5783d609aaf 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2003-03-02  Kazu Hirata  <kazu@cs.umass.edu>
+
+	* config/h8300/h8300.md (zero_extendqisi2): Change to an
+	expander.
+	(*zero_extendqisi2_h8300): New.
+	(*zero_extendqisi2_h8300hs): New.
+	(two splitters): New.
+
 2003-03-02  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 
 	* fp-bit.h (float_to_usi): Fix condition wrapping prototype.
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 06596e59dd7..495fba33d5c 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -2043,9 +2043,13 @@
 	(zero_extend:HI (match_dup 2)))]
   "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));")
 
-;; The compiler can synthesize a H8/300H variant of this which is
-;; just as efficient as one that we'd create
-(define_insn "zero_extendqisi2"
+(define_expand "zero_extendqisi2"
+  [(set (match_operand:SI 0 "register_operand" "")
+	(zero_extend:SI (match_operand:QI 1 "general_operand_src" "")))]
+  ""
+  "")
+
+(define_insn "*zero_extendqisi2_h8300"
   [(set (match_operand:SI 0 "register_operand" "=r,r")
 	(zero_extend:SI (match_operand:QI 1 "general_operand_src" "0,g>")))]
   "TARGET_H8300"
@@ -2055,6 +2059,40 @@
   [(set_attr "length" "4,8")
    (set_attr "cc" "clobber,clobber")])
 
+(define_insn "*zero_extendqisi2_h8300hs"
+  [(set (match_operand:SI 0 "register_operand" "=r,r")
+	(zero_extend:SI (match_operand:QI 1 "general_operand_src" "0,g>")))]
+  "TARGET_H8300H || TARGET_H8300S"
+  "@
+  extu.w	%T0\;extu.l	%S0
+  mov.b	%R1,%w0\;extu.w	%T0\;extu.l	%S0"
+  [(set_attr "length" "4,12")
+   (set_attr "cc" "set_znv,set_znv")])
+
+(define_split
+  [(set (match_operand:SI 0 "register_operand" "")
+	(zero_extend:SI (match_operand:QI 1 "general_operand_src" "")))]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && reg_overlap_mentioned_p (operands[0], operands[1])
+   && reload_completed" 
+  [(set (match_dup 2)
+	(match_dup 1))
+   (set (match_dup 0)
+	(zero_extend:SI (match_dup 2)))]
+  "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));")
+
+(define_split
+  [(set (match_operand:SI 0 "register_operand" "")
+	(zero_extend:SI (match_operand:QI 1 "general_operand_src" "")))]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && !reg_overlap_mentioned_p (operands[0], operands[1])
+   && reload_completed" 
+  [(set (match_dup 0)
+	(const_int 0))
+   (set (strict_low_part (match_dup 2))
+	(match_dup 1))]
+  "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));")
+
 (define_expand "zero_extendhisi2"
   [(set (match_operand:SI 0 "register_operand" "")
 	(zero_extend:SI (match_operand:HI 1 "register_operand" "")))]