From: Korey Sewell <ksewell@umich.edu>
Date: Sat, 1 Jul 2006 23:02:43 +0000 (-0400)
Subject: traceflag stuff
X-Git-Tag: m5_2.0_beta1~36^2~34
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=23cfd9489bdff00f926f5dcfb7dd72333fb11bfb;p=gem5.git

traceflag stuff

src/base/traceflags.py:
    add BaseCPU flag, O3CPUAll flag grouping
src/cpu/base.cc:
    Use BaseCPU flag instead of FullCPU flag

--HG--
extra : convert_revision : 32f737a2f58eb936634799f1f809e07cbba90179
---

diff --git a/src/base/traceflags.py b/src/base/traceflags.py
index c4dcb695b..d51236c46 100644
--- a/src/base/traceflags.py
+++ b/src/base/traceflags.py
@@ -115,6 +115,7 @@ baseFlags = [
     'MSHR',
     'Mbox',
     'MemDepUnit',
+    'BaseCPU'
     'O3CPU',
     'OzoneCPU',
     'FE',
@@ -176,7 +177,7 @@ compoundFlagMap = {
     'EthernetAll' : [ 'Ethernet', 'EthernetPIO', 'EthernetDMA', 'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ],
     'EthernetNoData' : [ 'Ethernet', 'EthernetPIO', 'EthernetDesc', 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ],
     'IdeAll' : [ 'IdeCtrl', 'IdeDisk' ],
-    'FullCPUAll' : [ 'Fetch', 'Decode', 'Rename', 'IEW', 'Commit', 'IQ', 'ROB', 'FreeList', 'RenameMap', 'LSQ', 'LSQUnit', 'StoreSet', 'MemDepUnit', 'DynInst', 'FullCPU', 'Activity','Scoreboard','Writeback'],
+    'O3CPUAll' : [ 'Fetch', 'Decode', 'Rename', 'IEW', 'Commit', 'IQ', 'ROB', 'FreeList', 'RenameMap', 'LSQ', 'LSQUnit', 'StoreSet', 'MemDepUnit', 'DynInst', 'O3CPU', 'Activity','Scoreboard','Writeback'],
     'OzoneCPUAll' : [ 'BE', 'FE', 'IBE', 'OzoneLSQ', 'OzoneCPU']
 }
 
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 40cec416b..9df61d2ce 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -68,12 +68,12 @@ BaseCPU::BaseCPU(Params *p)
       number_of_threads(p->numberOfThreads), system(p->system)
 #endif
 {
-    DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this);
+    DPRINTF(BaseCPU, "BaseCPU: Creating object, mem address %#x.\n", this);
 
     // add self to global list of CPUs
     cpuList.push_back(this);
 
-    DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
+    DPRINTF(BaseCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
             this);
 
     if (number_of_threads > maxThreadsPerCPU)