From: Francisco Jerez Date: Tue, 26 Apr 2016 00:02:05 +0000 (-0700) Subject: i965: Add plumbing for shader time in 32-wide FS dispatch mode. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=244a0ff3a8b47ae1aca549a801baafbeb5712213;p=mesa.git i965: Add plumbing for shader time in 32-wide FS dispatch mode. Reviewed-by: Jason Ekstrand Reviewed-by: Matt Turner --- diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c index 73f8c67802e..c36ec703b18 100644 --- a/src/intel/blorp/blorp.c +++ b/src/intel/blorp/blorp.c @@ -217,7 +217,7 @@ blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx, const unsigned *program = brw_compile_fs(compiler, blorp->driver_ctx, mem_ctx, wm_key, - wm_prog_data, nir, NULL, -1, -1, false, use_repclear, + wm_prog_data, nir, NULL, -1, -1, -1, false, use_repclear, NULL, NULL); return program; diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h index d3d1f35d016..1b9589c231a 100644 --- a/src/intel/compiler/brw_compiler.h +++ b/src/intel/compiler/brw_compiler.h @@ -1312,6 +1312,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data, struct gl_program *prog, int shader_time_index8, int shader_time_index16, + int shader_time_index32, bool allow_spilling, bool use_rep_send, struct brw_vue_map *vue_map, char **error_str); diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index bf301f4424b..73617e25804 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -7108,7 +7108,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data, const nir_shader *src_shader, struct gl_program *prog, int shader_time_index8, int shader_time_index16, - bool allow_spilling, + int shader_time_index32, bool allow_spilling, bool use_rep_send, struct brw_vue_map *vue_map, char **error_str) { diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 523202cf3d9..67ede46f2ae 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -986,7 +986,7 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline, const unsigned *shader_code = brw_compile_fs(compiler, NULL, mem_ctx, &key, &prog_data, nir, - NULL, -1, -1, true, false, NULL, NULL); + NULL, -1, -1, -1, true, false, NULL, NULL); if (shader_code == NULL) { ralloc_free(mem_ctx); return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 2613b9fda22..c9705cbd9cc 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -426,6 +426,7 @@ enum shader_time_shader_type { ST_GS, ST_FS8, ST_FS16, + ST_FS32, ST_CS, }; diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index bc7b41086ff..e5c7579cf68 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -541,6 +541,7 @@ brw_report_shader_time(struct brw_context *brw) case ST_GS: case ST_FS8: case ST_FS16: + case ST_FS32: case ST_CS: written = brw->shader_time.cumulative[i].written; reset = brw->shader_time.cumulative[i].reset; @@ -569,6 +570,7 @@ brw_report_shader_time(struct brw_context *brw) case ST_GS: case ST_FS8: case ST_FS16: + case ST_FS32: case ST_CS: total_by_type[type] += scaled[i]; break; @@ -618,6 +620,9 @@ brw_report_shader_time(struct brw_context *brw) case ST_FS16: stage = "fs16"; break; + case ST_FS32: + stage = "fs32"; + break; case ST_CS: stage = "cs"; break; @@ -637,6 +642,7 @@ brw_report_shader_time(struct brw_context *brw) print_shader_time_line("total", "gs", 0, total_by_type[ST_GS], total); print_shader_time_line("total", "fs8", 0, total_by_type[ST_FS8], total); print_shader_time_line("total", "fs16", 0, total_by_type[ST_FS16], total); + print_shader_time_line("total", "fs32", 0, total_by_type[ST_FS32], total); print_shader_time_line("total", "cs", 0, total_by_type[ST_CS], total); } diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 94048cd758f..cc6eaae1a84 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -164,18 +164,20 @@ brw_codegen_wm_prog(struct brw_context *brw, start_time = get_time(); } - int st_index8 = -1, st_index16 = -1; + int st_index8 = -1, st_index16 = -1, st_index32 = -1; if (INTEL_DEBUG & DEBUG_SHADER_TIME) { st_index8 = brw_get_shader_time_index(brw, &fp->program, ST_FS8, !fp->program.is_arb_asm); st_index16 = brw_get_shader_time_index(brw, &fp->program, ST_FS16, !fp->program.is_arb_asm); + st_index32 = brw_get_shader_time_index(brw, &fp->program, ST_FS32, + !fp->program.is_arb_asm); } char *error_str = NULL; program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx, key, &prog_data, fp->program.nir, - &fp->program, st_index8, st_index16, + &fp->program, st_index8, st_index16, st_index32, true, false, vue_map, &error_str);