From: Gabe Black <gblack@eecs.umich.edu>
Date: Thu, 12 Jun 2008 04:45:22 +0000 (-0400)
Subject: X86: Fix a byte register indexing issue in the sign extending move from memory microcode.
X-Git-Tag: m5_2.0_beta6~169
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=254cc076500ab7ee382d76a92db3a5a3c2ec1e62;p=gem5.git

X86: Fix a byte register indexing issue in the sign extending move from memory microcode.
---

diff --git a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
index 3b8608c48..16196bcc8 100644
--- a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2007 The Hewlett-Packard Development Company
+# Copyright (c) 2007-2008 The Hewlett-Packard Development Company
 # All rights reserved.
 #
 # Redistribution and use of this software in source and binary forms,
@@ -130,14 +130,14 @@ def macroop MOVSX_B_R_R {
 };
 
 def macroop MOVSX_B_R_M {
-    ld reg, seg, sib, disp, dataSize=1
-    sexti reg, reg, 7
+    ld t1, seg, sib, disp, dataSize=1
+    sexti reg, t1, 7
 };
 
 def macroop MOVSX_B_R_P {
     rdip t7
-    ld reg, seg, riprel, disp, dataSize=1
-    sexti reg, reg, 7
+    ld t1, seg, riprel, disp, dataSize=1
+    sexti reg, t1, 7
 };
 
 def macroop MOVSX_W_R_R {