From: Marcelina Kościelnicka <mwk@0x04.net>
Date: Thu, 16 Jun 2022 04:04:04 +0000 (+0200)
Subject: memory_libmap: Fix params emitted for unused ports for consistency.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=25a4cd7020c100838e359b393ffb545532e69101;p=yosys.git

memory_libmap: Fix params emitted for unused ports for consistency.
---

diff --git a/passes/memory/memory_libmap.cc b/passes/memory/memory_libmap.cc
index 898e0af85..d77e4be30 100644
--- a/passes/memory/memory_libmap.cc
+++ b/passes/memory/memory_libmap.cc
@@ -1706,10 +1706,11 @@ void MemMapping::emit_port(const MemConfig &cfg, std::vector<Cell*> &cells, cons
 				if (pdef.wrbe_separate) {
 					cell->setPort(stringf("\\PORT_%s_WR_EN", name), State::S0);
 					cell->setPort(stringf("\\PORT_%s_WR_BE", name), hw_wren);
-					cell->setParam(stringf("\\PORT_%s_WR_BE_WIDTH", name), GetSize(hw_wren));
+					if (cfg.def->width_mode != WidthMode::Single)
+						cell->setParam(stringf("\\PORT_%s_WR_BE_WIDTH", name), GetSize(hw_wren));
 				} else {
 					cell->setPort(stringf("\\PORT_%s_WR_EN", name), hw_wren);
-					if (cfg.def->byte != 0)
+					if (cfg.def->byte != 0 && cfg.def->width_mode != WidthMode::Single)
 						cell->setParam(stringf("\\PORT_%s_WR_EN_WIDTH", name), GetSize(hw_wren));
 				}
 			}