From: lkcl <lkcl@web>
Date: Thu, 9 Sep 2021 11:41:49 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~173
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=25a5e43d1bf11c960b46234cb01c412b584821f9;p=libreriscv.git

---

diff --git a/openpower/sv/cr_ops.mdwn b/openpower/sv/cr_ops.mdwn
index b34906362..7f5dd8d2c 100644
--- a/openpower/sv/cr_ops.mdwn
+++ b/openpower/sv/cr_ops.mdwn
@@ -81,11 +81,10 @@ There are two primary different types of CR operations:
 * Those which have a 5-bit operand (referring to a bit within the
    whole 32-bit CR)
 
-Examining these two as has already been done it is observed that the
+Examining these two types it is observed that the
 difference may be considered to be that the 5-bit variant provides
 additional information about which CR Field bit (EQ, GE, LT, SO) is to
 be operated on by the instruction.
-
 Thus, logically, we may set the following rule:
 
 * When a 5-bit CR Result field is used in an instruction, the