From: Eddie Hung <eddie@fpgeh.com>
Date: Wed, 29 May 2019 22:26:33 +0000 (-0700)
Subject: Rename to #23
X-Git-Tag: working-ls180~1208^2~243
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=25befbf5425458cf8cc5ee89635ad7e5f42d5778;p=yosys.git

Rename to #23
---

diff --git a/tests/simple_abc9/abc9.v b/tests/simple_abc9/abc9.v
index 7af2ace01..2752ff8cc 100644
--- a/tests/simple_abc9/abc9.v
+++ b/tests/simple_abc9/abc9.v
@@ -237,10 +237,10 @@ module abc9_test022
 endmodule
 
 // Citation: https://github.com/riscv/riscv-bitmanip
-// TODO: yosys -p "synth_xilinx -abc9 -top abc9_test024" abc9.v -q
+// TODO: yosys -p "synth_xilinx -abc9 -top abc9_test023" abc9.v -q
 // returns before 14233843
-//   Warning: Wire abc9_test024.\dout [1] is used but has no driver.
-module abc9_test024 #(
+//   Warning: Wire abc9_test023.\dout [1] is used but has no driver.
+module abc9_test023 #(
 	parameter integer N = 2,
 	parameter integer M = 2
 ) (