From: lkcl <lkcl@web>
Date: Sat, 14 May 2022 09:54:20 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2244
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=25f45667dc1ca57769327444edb81d2a48097f6b;p=libreriscv.git

---

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index 271944f3d..c897610c0 100644
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -1148,3 +1148,7 @@ same category.
   and that it is designed to "complement" AI rather than compete.
   With only 9 instructions, 2 of which will be LOAD and STORE,
   conditional code execution seems unlikely.
+  Silicon area in DRAM is increased by 5% for a much greater reduction
+  in power. The article notes, pointedly, that programmability will
+  be a key deciding factor.  The article also notes that Samsung has
+  proposed its architecture as a JEDEC Standard.