From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 15 Aug 2019 19:19:47 +0000 (-0700)
Subject: Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp
X-Git-Tag: working-ls180~1039^2~235
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=261daffd9d18adb13bb3dc53b17d3543109ea26c;p=yosys.git

Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp
---

261daffd9d18adb13bb3dc53b17d3543109ea26c
diff --cc techlibs/xilinx/synth_xilinx.cc
index 477b2f6f7,546d67337..102c896aa
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@@ -283,10 -283,12 +283,12 @@@ struct SynthXilinxPass : public ScriptP
  			}
  
  			run("techmap -map +/cmp2lut.v -D LUT_WIDTH=6");
+ 		}
  
+ 		if (check_label("dsp")) {
  			if (!nodsp || help_mode) {
  				// NB: Xilinx multipliers are signed only
 -				run("techmap -map +/mul2dsp.v -map +/xilinx/dsp_map.v -D DSP_A_MAXWIDTH=25 -D DSP_B_MAXWIDTH=18 -D DSP_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18", "(skip if '-nodsp')");
 +				run("techmap -map +/mul2dsp.v -map +/xilinx/dsp_map.v -D DSP_A_MAXWIDTH=25 -D DSP_A_MAXWIDTH_PARTIAL=18 -D DSP_B_MAXWIDTH=18 -D DSP_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18", "(skip if '-nodsp')");
  				run("opt_expr -fine", "                 (skip if '-nodsp')");
  				run("wreduce", "                        (skip if '-nodsp')");
  				run("xilinx_dsp", "                     (skip if '-nodsp')");