From: Luke Kenneth Casson Leighton Date: Tue, 4 Oct 2022 11:29:04 +0000 (+0100) Subject: observation motivation on ls002, even FPR=0 needs FLD X-Git-Tag: opf_rfc_ls005_v1~193 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2642c38ace6d489e1a3785bcbd7924af71aa5396;p=libreriscv.git observation motivation on ls002, even FPR=0 needs FLD --- diff --git a/openpower/sv/rfc/ls002.mdwn b/openpower/sv/rfc/ls002.mdwn index 2971f9dbe..096da9a3a 100644 --- a/openpower/sv/rfc/ls002.mdwn +++ b/openpower/sv/rfc/ls002.mdwn @@ -57,7 +57,7 @@ Similar to `lxvkq` but extended to a full BF16 with one 32-bit instruction and a full FP32 in two 32-bit instructions these instructions always save a Data Load and associated L1 -and TLB lookup. +and TLB lookup. Even clearing an FPR to zero presently requires Load. **Notes and Observations**: