From: Luke Kenneth Casson Leighton Date: Sun, 21 Jul 2019 20:12:12 +0000 (+0100) Subject: create get_core_config function X-Git-Tag: ls180-24jan2020~791 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=269d51f71dba0d6deead774b4df6d2f9cf9d8fe9;p=ieee754fpu.git create get_core_config function --- diff --git a/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py b/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py index e885aa4d..7146b574 100644 --- a/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py +++ b/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py @@ -131,12 +131,15 @@ class DivPipeBaseStage: m.d.comb += self.o.out_do_z.eq(self.i.out_do_z) m.d.comb += self.o.ctx.eq(self.i.ctx) + def get_core_config(self): + width = self.pspec.width + return DivPipeCoreConfig(width+2, 0, 1) + class DivPipeSetupStage(DivPipeBaseStage, DivPipeCoreSetupStage): def __init__(self, pspec): - # XXX TODO: get core_config from pspec - DivPipeCoreSetupStage.__init__(core_config) + DivPipeCoreSetupStage.__init__(self.get_core_config()) self.pspec = pspec def elaborate(self, platform): @@ -148,8 +151,7 @@ class DivPipeSetupStage(DivPipeBaseStage, DivPipeCoreSetupStage): class DivPipeCalculateStage(DivPipeBaseStage, DivPipeCoreCalculateStage): def __init__(self, pspec, stage_index): - # XXX TODO: get core_config from pspec - DivPipeCoreCalculateStage.__init__(core_config, stage_index) + DivPipeCoreCalculateStage.__init__(self.get_core_config(), stage_index) self.pspec = pspec def elaborate(self, platform): @@ -161,8 +163,7 @@ class DivPipeCalculateStage(DivPipeBaseStage, DivPipeCoreCalculateStage): class DivPipeFinalStage(DivPipeBaseStage, DivPipeCoreFinalStage): def __init__(self, pspec, stage_index): - # XXX TODO: get core_config from pspec - DivPipeCoreFinalStage.__init__(core_config, stage_index) + DivPipeCoreFinalStage.__init__(self.get_core_config(), stage_index) self.pspec = pspec def elaborate(self, platform):