From: Uros Bizjak <ubizjak@gmail.com>
Date: Thu, 18 Jul 2019 19:59:55 +0000 (+0200)
Subject: i386.md (*addqi_2_slp): Remove.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2737c5909faa91ef1b8e0cbf42158632c4ab597e;p=gcc.git

i386.md (*addqi_2_slp): Remove.

	* config/i386/i386.md (*addqi_2_slp): Remove.
	(*<code>qi_2_slp): Ditto.

From-SVN: r273583
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 55680d13c29..35e4f37caa6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2019-07-18  Uroš Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386.md (*addqi_2_slp): Remove.
+	(*<code>qi_2_slp): Ditto.
+
 2019-07-18  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/predicates.md (prefixed_mem_operand): Call
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 4fc03009c53..63f18d7874b 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -8723,20 +8723,6 @@
   [(set_attr "type" "alu")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "*andqi_2_slp"
-  [(set (reg FLAGS_REG)
-	(compare (and:QI (match_operand:QI 0 "nonimmediate_operand" "+qm,q")
-		 	 (match_operand:QI 1 "nonimmediate_operand" "qn,m"))
-		 (const_int 0)))
-   (set (strict_low_part (match_dup 0))
-	(and:QI (match_dup 0) (match_dup 1)))]
-  "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
-   && ix86_match_ccmode (insn, CCNOmode)
-   && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
-  "and{b}\t{%1, %0|%0, %1}"
-  [(set_attr "type" "alu1")
-   (set_attr "mode" "QI")])
-
 (define_insn "andqi_ext_1"
   [(set (zero_extract:SI (match_operand 0 "ext_register_operand" "+Q,Q")
 			 (const_int 8)
@@ -9155,20 +9141,6 @@
   [(set_attr "type" "alu")
    (set_attr "mode" "SI")])
 
-(define_insn "*<code>qi_2_slp"
-  [(set (reg FLAGS_REG)
-	(compare (any_or:QI (match_operand:QI 0 "nonimmediate_operand" "+qm,q")
-			    (match_operand:QI 1 "general_operand" "qn,m"))
-		 (const_int 0)))
-   (set (strict_low_part (match_dup 0))
-	(any_or:QI (match_dup 0) (match_dup 1)))]
-  "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
-   && ix86_match_ccmode (insn, CCNOmode)
-   && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
-  "<logic>{<imodesuffix>}\t{%2, %0|%0, %2}"
-  [(set_attr "type" "alu1")
-   (set_attr "mode" "QI")])
-
 (define_insn "*<code><mode>_3"
   [(set (reg FLAGS_REG)
 	(compare (any_or:SWI