From: lkcl <lkcl@web>
Date: Sat, 18 Jun 2022 22:17:33 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1695
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2745d2165f4e2163f84554806a62e0eada702974;p=libreriscv.git

---

diff --git a/openpower/sv.mdwn b/openpower/sv.mdwn
index 7b13623c8..876216536 100644
--- a/openpower/sv.mdwn
+++ b/openpower/sv.mdwn
@@ -67,7 +67,8 @@ Comparative instruction count:
 * ARM NEON SIMD: around 2,000 instructions, prerequisite: ARM Scalar.
 * ARM SVE: around 4,000 instructions, prerequisite: NEON. 
 * ARM SVE2: around 1,000 instructions, prerequisite: SVE
-* Intel AVX-512: around 4,000 instructions, prerequisite AVX2 etc.
+* Intel AVX-512: around 4,000 instructions, prerequisite AVX, AVX2,
+  AVX-128 and AVX-256.
 * RISV-V RVV: 192 instructions, prerequisite 96 Scalar RV64GC instructions
 * SVP64: **five** instructions, 24-bit prefixing of
   prerequisite SFS (150) or