From: Luke Kenneth Casson Leighton Date: Sat, 31 Mar 2018 08:06:13 +0000 (+0100) Subject: big pep8 whitespace cleanup X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2771d517f727f56dd2c03982da4a940415d4e428;p=pinmux.git big pep8 whitespace cleanup --- diff --git a/src/spec/base.py b/src/spec/base.py index 1f241b0..ba0ce10 100644 --- a/src/spec/base.py +++ b/src/spec/base.py @@ -31,7 +31,7 @@ class PinSpec(Pinouts): self.scenarios.append((name, needed, eint, pwm, descriptions)) def write(self, of): - of.write ("""# Pinouts (PinMux) + of.write("""# Pinouts (PinMux) auto-generated by [[pinouts.py]] [[!toc ]] @@ -39,10 +39,10 @@ auto-generated by [[pinouts.py]] """) display(of, self) - of.write ("\n# Pinouts (Fixed function)\n\n") + of.write("\n# Pinouts (Fixed function)\n\n") fixedpins = display_fixed(of, self.fixedpins, len(self)) - of.write ("""# Functions (PinMux) + of.write("""# Functions (PinMux) auto-generated by [[pinouts.py]] @@ -57,8 +57,7 @@ auto-generated by [[pinouts.py]] needed, eint, pwm, descriptions) - - of.write ("""# Reference Datasheets + of.write("""# Reference Datasheets datasheets and pinout links * @@ -74,4 +73,3 @@ datasheets and pinout links """) return self, self.bankspec, self.pinbanks, fixedpins - diff --git a/src/spec/c_class.py b/src/spec/c_class.py index 0bc7f11..704eaf9 100644 --- a/src/spec/c_class.py +++ b/src/spec/c_class.py @@ -240,7 +240,7 @@ auto-generated by [[pinouts.py]] unused_pins = check_functions("Robotics", bankspec, fns, pinouts, robotics, robotics_eint, robotics_pwm) - of.write ("""# Reference Datasheets + of.write("""# Reference Datasheets datasheets and pinout links * diff --git a/src/spec/gen.py b/src/spec/gen.py index cfc59a0..41d9834 100644 --- a/src/spec/gen.py +++ b/src/spec/gen.py @@ -62,8 +62,7 @@ def specgen(of, pth, pinouts, bankspec, pinbanks, fixedpins): # lists bankspec, shows where the pin-numbers *start* of.write("# Pin Bank starting points and lengths\n\n") with open(os.path.join(pth, 'pinspec.txt'), 'w') as g: - keys = list(bankspec.keys()) - keys.sort() + keys = sorted(bankspec.keys()) for bank in keys: pinstart = bankspec[bank] of.write("* %s %d %d\n" % (bank, pinstart, pinbanks[bank])) diff --git a/src/spec/m_class.py b/src/spec/m_class.py index 55b8b3a..cacab5e 100644 --- a/src/spec/m_class.py +++ b/src/spec/m_class.py @@ -2,6 +2,7 @@ from spec.base import PinSpec + def pinspec(of): pinbanks = {'A': 16, 'B': 28, @@ -13,183 +14,64 @@ def pinspec(of): } fixedpins = { 'DDR3': [ - 'SDQ0', - 'SDQ1', - 'SDQ2', - 'SDQ3', - 'SDQ4', - 'SDQ5', - 'SDQ6', - 'SDQ7', - 'SDQ8', - 'SDQ9', - 'SDQ10', - 'SDQ11', - 'SDQ12', - 'SDQ13', - 'SDQ14', - 'SDQ15', - 'SDQ16', - 'SDQ17', - 'SDQ18', - 'SDQ19', - 'SDQ20', - 'SDQ21', - 'SDQ22', - 'SDQ23', - 'SDQ24', - 'SDQ25', - 'SDQ26', - 'SDQ27', - 'SDQ28', - 'SDQ29', - 'SDQ30', - 'SDQ31', - 'SVREF0', - 'SVREF1', - 'SVREF2', - 'SVREF3', - 'SDQS0', - 'SDQS0#', - 'SDQS1', - 'SDQS1#', - 'SDQS2', - 'SDQS2#', - 'SDQS3', - 'SDQS3#', - 'SDQM0', - 'SDQM1', - 'SDQM2', - 'SDQM3', - 'SCK#', - 'SCK', - 'SCKE0', - 'SCKE1', - 'SA0', - 'SA1', - 'SA2', - 'SA3', - 'SA4', - 'SA5', - 'SA6', - 'SA7', - 'SA8', - 'SA9', - 'SA10', - 'SA11', - 'SA12', - 'SA13', - 'SA14', - 'SBA0', - 'SBA1', - 'SBA2', - 'SWE', - 'SCAS', - 'SRAS', - 'SCS0', - 'SCS1', - 'SZQ', - 'SRST', - 'SDBG0', - 'SDBG1', - 'ADBG', - 'ODT0', - 'ODT1'], + 'SDQ0', 'SDQ1', 'SDQ2', 'SDQ3', + 'SDQ4', 'SDQ5', 'SDQ6', 'SDQ7', + 'SDQ8', 'SDQ9', 'SDQ10', 'SDQ11', + 'SDQ12', 'SDQ13', 'SDQ14', 'SDQ15', + 'SDQ16', 'SDQ17', 'SDQ18', 'SDQ19', + 'SDQ20', 'SDQ21', 'SDQ22', 'SDQ23', + 'SDQ24', 'SDQ25', 'SDQ26', 'SDQ27', + 'SDQ28', 'SDQ29', 'SDQ30', 'SDQ31', + 'SVREF0', 'SVREF1', 'SVREF2', 'SVREF3', + 'SDQS0', 'SDQS0#', 'SDQS1', 'SDQS1#', + 'SDQS2', 'SDQS2#', 'SDQS3', 'SDQS3#', + 'SDQM0', 'SDQM1', 'SDQM2', 'SDQM3', + 'SCK#', 'SCK', 'SCKE0', 'SCKE1', + 'SA0', 'SA1', 'SA2', 'SA3', + 'SA4', 'SA5', 'SA6', 'SA7', + 'SA8', 'SA9', 'SA10', 'SA11', + 'SA12', 'SA13', 'SA14', + 'SBA0', 'SBA1', 'SBA2', + 'SWE', 'SCAS', 'SRAS', 'SCS0', + 'SCS1', 'SZQ', 'SRST', + 'SDBG0', 'SDBG1', 'ADBG', + 'ODT0', 'ODT1'], 'CTRL_SYS': [ - 'TEST', - 'JTAG_SEL', - 'UBOOT_SEL', - 'NMI#', - 'RESET#', - 'CLK24M_IN', - 'CLK24M_OUT', - 'PLLTEST', - 'PLLREGIO', - 'PLLVP25', - 'PLLDV', - 'PLLVREG', - 'PLLGND', + 'TEST', 'JTAG_SEL', 'UBOOT_SEL', + 'NMI#', 'RESET#', 'CLK24M_IN', 'CLK24M_OUT', + 'PLLTEST', 'PLLREGIO', 'PLLVP25', + 'PLLDV', 'PLLVREG', 'PLLGND', ], 'POWER_DRAM': [ - 'VCC0_DRAM', - 'VCC1_DRAM', - 'VCC2_DRAM', - 'VCC3_DRAM', - 'VCC4_DRAM', - 'VCC5_DRAM', - 'VCC6_DRAM', - 'VCC7_DRAM', - 'VCC8_DRAM', - 'VCC9_DRAM', - 'GND0_DRAM', - 'GND1_DRAM', - 'GND2_DRAM', - 'GND3_DRAM', - 'GND4_DRAM', - 'GND5_DRAM', - 'GND6_DRAM', - 'GND7_DRAM', - 'GND8_DRAM', - 'GND9_DRAM', + 'VCC0_DRAM', 'VCC1_DRAM', 'VCC2_DRAM', 'VCC3_DRAM', + 'VCC4_DRAM', 'VCC5_DRAM', 'VCC6_DRAM', 'VCC7_DRAM', + 'VCC8_DRAM', 'VCC9_DRAM', + 'GND0_DRAM', 'GND1_DRAM', 'GND2_DRAM', 'GND3_DRAM', + 'GND4_DRAM', 'GND5_DRAM', 'GND6_DRAM', 'GND7_DRAM', + 'GND8_DRAM', 'GND9_DRAM', ], 'POWER_CPU': [ - 'VDD0_CPU', - 'VDD1_CPU', - 'VDD2_CPU', - 'VDD3_CPU', - 'VDD4_CPU', - 'VDD5_CPU', - 'GND0_CPU', - 'GND1_CPU', - 'GND2_CPU', - 'GND3_CPU', - 'GND4_CPU', - 'GND5_CPU', + 'VDD0_CPU', 'VDD1_CPU', 'VDD2_CPU', + 'VDD3_CPU', 'VDD4_CPU', 'VDD5_CPU', + 'GND0_CPU', 'GND1_CPU', 'GND2_CPU', + 'GND3_CPU', 'GND4_CPU', 'GND5_CPU', ], 'POWER_DLL': [ - 'VDD0_DLL', - 'VDD1_DLL', - 'VDD2_DLL', - 'GND0_DLL', - 'GND1_DLL', - 'GND2_DLL', + 'VDD0_DLL', 'VDD1_DLL', 'VDD2_DLL', + 'GND0_DLL', 'GND1_DLL', 'GND2_DLL', ], 'POWER_INT': [ - 'VDD0_INT', - 'VDD1_INT', - 'VDD2_INT', - 'VDD3_INT', - 'VDD4_INT', - 'VDD5_INT', - 'VDD6_INT', - 'VDD7_INT', - 'VDD8_INT', - 'VDD9_INT', - 'GND0_INT', - 'GND1_INT', - 'GND2_INT', - 'GND3_INT', - 'GND4_INT', - 'GND5_INT', - 'GND6_INT', - 'GND7_INT', - 'GND8_INT', - 'GND9_INT', + 'VDD0_INT', 'VDD1_INT', 'VDD2_INT', 'VDD3_INT', 'VDD4_INT', + 'VDD5_INT', 'VDD6_INT', 'VDD7_INT', 'VDD8_INT', 'VDD9_INT', + 'GND0_INT', 'GND1_INT', 'GND2_INT', 'GND3_INT', 'GND4_INT', + 'GND5_INT', 'GND6_INT', 'GND7_INT', 'GND8_INT', 'GND9_INT', ], 'POWER_GPIO': [ - 'VDD_GPIOA', - 'VDD_GPIOB', - 'VDD_GPIOC', - 'VDD_GPIOD', - 'VDD_GPIOE', - 'VDD_GPIOF', + 'VDD_GPIOA', 'VDD_GPIOB', 'VDD_GPIOC', + 'VDD_GPIOD', 'VDD_GPIOE', 'VDD_GPIOF', 'VDD_GPIOG', - 'GND_GPIOA', - 'GND_GPIOB', - 'GND_GPIOC', - 'GND_GPIOD', - 'GND_GPIOE', - 'GND_GPIOF', + 'GND_GPIOA', 'GND_GPIOB', 'GND_GPIOC', + 'GND_GPIOD', 'GND_GPIOE', 'GND_GPIOF', 'GND_GPIOG', ]} @@ -383,7 +265,8 @@ def pinspec(of): industrial_eint = ['EINT_24', 'EINT_25', 'EINT_26', 'EINT_27', 'EINT_20', 'EINT_21', 'EINT_22', 'EINT_23'] - ps.add_scenario("Industrial", industrial, industrial_eint, industrial_pwm, None) + ps.add_scenario("Industrial", industrial, industrial_eint, + industrial_pwm, None) # Industrial scenario, using an SPI-based LCD instead of RGB/TTL # not totally complete (some GPIO needed for PMIC) @@ -407,7 +290,7 @@ def pinspec(of): } ps.add_scenario("Industrial with SPI-LCD", - industrial, industrial_eint, industrial_pwm, + industrial, industrial_eint, industrial_pwm, ind_descriptions) # Smartphone / Tablet - basically the same thing @@ -488,8 +371,8 @@ def pinspec(of): } ps.add_scenario("Smartphone / Tablet", - tablet, tablet_eint, tablet_pwm, - descriptions) + tablet, tablet_eint, tablet_pwm, + descriptions) # Laptop @@ -543,8 +426,8 @@ def pinspec(of): 'EINT_31': 'PMIC_INT', } ps.add_scenario("Laptop / Netbook", - laptop, laptop_eint, laptop_pwm, - descriptions) + laptop, laptop_eint, laptop_pwm, + descriptions) # IoT @@ -634,8 +517,8 @@ def pinspec(of): 'EINT_30': 'CTP_INT', 'EINT_31': 'SD_DETN', } - ps.add_scenario( "IoT", - iot, iot_eint, iot_pwm, - descriptions) + ps.add_scenario("IoT", + iot, iot_eint, iot_pwm, + descriptions) return ps.write(of) diff --git a/src/spec/minitest.py b/src/spec/minitest.py index b71e842..f55b32e 100644 --- a/src/spec/minitest.py +++ b/src/spec/minitest.py @@ -58,7 +58,6 @@ def pinspec(of): 'ULPI2': 'ULPI (USB Low Pin-count) 2', } - ps = PinSpec(pinbanks, fixedpins, function_names) # Bank B, 16-47