From: Andrew Cagney <cagney@redhat.com>
Date: Tue, 18 Apr 2000 07:55:35 +0000 (+0000)
Subject: Add support for SIGILL (reserved-instruction-exception).
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=27842f65f27045c0f1d7885d4f34ac37625e645c;p=binutils-gdb.git

Add support for SIGILL (reserved-instruction-exception).
---

diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog
index 6d8993ab4c2..0b4b1b62bb9 100644
--- a/sim/d10v/ChangeLog
+++ b/sim/d10v/ChangeLog
@@ -1,3 +1,8 @@
+Tue Apr 18 16:26:41 2000  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* interp.c (sim_resume): Deliver SIGILL.
+	(lookup_hash): Do not print SIGILL message.
+
 Tue Feb 22 18:24:56 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 
 	* Makefile.in (SIM_EXTRA_CFLAGS): Define SIM_HAVE_ENVIRONMENT.
diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c
index 91ebee56ce9..ce4b7694bb3 100644
--- a/sim/d10v/interp.c
+++ b/sim/d10v/interp.c
@@ -99,8 +99,6 @@ lookup_hash (ins, size)
     {
       if (h->next == NULL)
 	{
-	  (*d10v_callback->printf_filtered)
-	    (d10v_callback, "ERROR: Illegal instruction %x at PC %x\n", ins, PC);
 	  State.exception = SIGILL;
 	  State.pc_changed = 1; /* Don't increment the PC. */
 	  return NULL;
@@ -979,6 +977,13 @@ sim_resume (sd, step, siggnal)
       JMP (AE_VECTOR_START);
       SLOT_FLUSH ();
       break;
+    case SIGILL:
+      SET_BPC (PC);
+      SET_BPSW (PSW);
+      SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
+      JMP (RIE_VECTOR_START);
+      SLOT_FLUSH ();
+      break;
     default:
       /* just ignore it */
       break;
diff --git a/sim/testsuite/d10v-elf/ChangeLog b/sim/testsuite/d10v-elf/ChangeLog
index a7cf211ce36..11d43190f10 100644
--- a/sim/testsuite/d10v-elf/ChangeLog
+++ b/sim/testsuite/d10v-elf/ChangeLog
@@ -1,3 +1,8 @@
+Tue Apr 18 16:32:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* t-rie-xx.s (test_rie_xx): New test.
+	* Makefile.in (TESTS): Update.
+
 Tue Feb 22 17:36:34 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 
 	* Makefile.in: Force d10v into operating mode.
diff --git a/sim/testsuite/d10v-elf/Makefile.in b/sim/testsuite/d10v-elf/Makefile.in
index 40e96464eb5..0626ee8781c 100644
--- a/sim/testsuite/d10v-elf/Makefile.in
+++ b/sim/testsuite/d10v-elf/Makefile.in
@@ -83,6 +83,7 @@ TESTS = \
 	t-ae-st2w-ip.ok \
 	t-ae-st2w-is.ok \
 	t-mod-ld-pre.ok \
+	t-rie-xx.ok \
 #
 
 AS_FOR_TARGET = `\
diff --git a/sim/testsuite/d10v-elf/t-rie-xx.s b/sim/testsuite/d10v-elf/t-rie-xx.s
new file mode 100644
index 00000000000..2a6fcbdd6fc
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-rie-xx.s
@@ -0,0 +1,12 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_RIE&DMAP_MASK)+DMAP_BASE PSW_BITS test_rie_xx
+	
+test_rie_xx:
+        .short 0xe120, 0x0000  ;; Example of RIE code
+	nop
+	exit47