From: Eric Anholt Date: Thu, 20 Jun 2013 18:43:48 +0000 (-0700) Subject: i915: Remove the I915 macro from the formerly shared code. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=279f0bce47be8f11d2ba2561179af166fe6c37bf;p=mesa.git i915: Remove the I915 macro from the formerly shared code. Reviewed-by: Kenneth Graunke --- diff --git a/src/mesa/drivers/dri/i915/Makefile.am b/src/mesa/drivers/dri/i915/Makefile.am index a4055e1476f..978917c6c3e 100644 --- a/src/mesa/drivers/dri/i915/Makefile.am +++ b/src/mesa/drivers/dri/i915/Makefile.am @@ -24,7 +24,6 @@ include Makefile.sources AM_CFLAGS = \ - -DI915 \ -I$(top_srcdir)/include \ -I$(top_srcdir)/src/ \ -I$(top_srcdir)/src/mapi \ diff --git a/src/mesa/drivers/dri/i915/intel_blit.c b/src/mesa/drivers/dri/i915/intel_blit.c index 9ab28e960e6..68bd0f517e0 100644 --- a/src/mesa/drivers/dri/i915/intel_blit.c +++ b/src/mesa/drivers/dri/i915/intel_blit.c @@ -349,17 +349,6 @@ intelEmitCopyBlit(struct intel_context *intel, return false; } -#ifndef I915 - if (dst_tiling != I915_TILING_NONE) { - CMD |= XY_DST_TILED; - dst_pitch /= 4; - } - if (src_tiling != I915_TILING_NONE) { - CMD |= XY_SRC_TILED; - src_pitch /= 4; - } -#endif - if (dst_y2 <= dst_y || dst_x2 <= dst_x) { return true; } @@ -491,12 +480,6 @@ intelClearWithBlit(struct gl_context *ctx, GLbitfield mask) assert(region->tiling != I915_TILING_Y); -#ifndef I915 - if (region->tiling != I915_TILING_NONE) { - CMD |= XY_DST_TILED; - pitch /= 4; - } -#endif BR13 |= pitch; if (is_depth_stencil) { @@ -611,12 +594,6 @@ intelEmitImmediateColorExpandBlit(struct intel_context *intel, opcode = XY_SETUP_BLT_CMD; if (cpp == 4) opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; -#ifndef I915 - if (dst_tiling != I915_TILING_NONE) { - opcode |= XY_DST_TILED; - dst_pitch /= 4; - } -#endif br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29); br13 |= br13_for_cpp(cpp); @@ -728,12 +705,6 @@ intel_miptree_set_alpha_to_one(struct intel_context *intel, CMD = XY_COLOR_BLT_CMD; CMD |= XY_BLT_WRITE_ALPHA; -#ifndef I915 - if (region->tiling != I915_TILING_NONE) { - CMD |= XY_DST_TILED; - pitch /= 4; - } -#endif BR13 |= pitch; /* do space check before going any further */ diff --git a/src/mesa/drivers/dri/i915/intel_buffer_objects.c b/src/mesa/drivers/dri/i915/intel_buffer_objects.c index f568864f4b4..77b074d278b 100644 --- a/src/mesa/drivers/dri/i915/intel_buffer_objects.c +++ b/src/mesa/drivers/dri/i915/intel_buffer_objects.c @@ -39,10 +39,6 @@ #include "intel_mipmap_tree.h" #include "intel_regions.h" -#ifndef I915 -#include "brw_context.h" -#endif - static GLboolean intel_bufferobj_unmap(struct gl_context * ctx, struct gl_buffer_object *obj); @@ -53,15 +49,6 @@ intel_bufferobj_alloc_buffer(struct intel_context *intel, { intel_obj->buffer = drm_intel_bo_alloc(intel->bufmgr, "bufferobj", intel_obj->Base.Size, 64); - -#ifndef I915 - /* the buffer might be bound as a uniform buffer, need to update it - */ - { - struct brw_context *brw = brw_context(&intel->ctx); - brw->state.dirty.brw |= BRW_NEW_UNIFORM_BUFFER; - } -#endif } static void @@ -134,12 +121,6 @@ intel_bufferobj_data(struct gl_context * ctx, struct intel_context *intel = intel_context(ctx); struct intel_buffer_object *intel_obj = intel_buffer_object(obj); - /* Part of the ABI, but this function doesn't use it. - */ -#ifndef I915 - (void) target; -#endif - intel_obj->Base.Size = size; intel_obj->Base.Usage = usage; @@ -152,9 +133,8 @@ intel_bufferobj_data(struct gl_context * ctx, intel_obj->sys_buffer = NULL; if (size != 0) { -#ifdef I915 - /* On pre-965, stick VBOs in system memory, as we're always doing - * swtnl with their contents anyway. + /* Stick VBOs in system memory, as we're always doing swtnl with their + * contents anyway. */ if (target == GL_ARRAY_BUFFER || target == GL_ELEMENT_ARRAY_BUFFER) { intel_obj->sys_buffer = malloc(size); @@ -164,7 +144,7 @@ intel_bufferobj_data(struct gl_context * ctx, return true; } } -#endif + intel_bufferobj_alloc_buffer(intel, intel_obj); if (!intel_obj->buffer) return false; diff --git a/src/mesa/drivers/dri/i915/intel_buffers.h b/src/mesa/drivers/dri/i915/intel_buffers.h index 4e3d13087fe..08065d33aef 100644 --- a/src/mesa/drivers/dri/i915/intel_buffers.h +++ b/src/mesa/drivers/dri/i915/intel_buffers.h @@ -49,8 +49,6 @@ intel_draw_buffer(struct gl_context * ctx) } extern void intelInitBufferFuncs(struct dd_function_table *functions); -#ifdef I915 void intelCalcViewport(struct gl_context * ctx); -#endif #endif /* INTEL_BUFFERS_H */ diff --git a/src/mesa/drivers/dri/i915/intel_context.c b/src/mesa/drivers/dri/i915/intel_context.c index 7135a660c44..827d6c69b97 100644 --- a/src/mesa/drivers/dri/i915/intel_context.c +++ b/src/mesa/drivers/dri/i915/intel_context.c @@ -622,12 +622,10 @@ intelInitContext(struct intel_context *intel, intel->prim.primitive = ~0; /* Force all software fallbacks */ -#ifdef I915 if (driQueryOptionb(&intel->optionCache, "no_rast")) { fprintf(stderr, "disabling 3D rasterization\n"); intel->no_rast = 1; } -#endif if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) { fprintf(stderr, "flushing batchbuffer before/after each draw call\n"); diff --git a/src/mesa/drivers/dri/i915/intel_fbo.c b/src/mesa/drivers/dri/i915/intel_fbo.c index ed1a26b5d64..83699c0549e 100644 --- a/src/mesa/drivers/dri/i915/intel_fbo.c +++ b/src/mesa/drivers/dri/i915/intel_fbo.c @@ -48,9 +48,6 @@ #include "intel_mipmap_tree.h" #include "intel_regions.h" #include "intel_tex.h" -#ifndef I915 -#include "brw_context.h" -#endif #define FILE_DEBUG_FLAG DEBUG_FBO @@ -742,15 +739,6 @@ intel_blit_framebuffer(struct gl_context *ctx, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter) { -#ifndef I915 - mask = brw_blorp_framebuffer(intel_context(ctx), - srcX0, srcY0, srcX1, srcY1, - dstX0, dstY0, dstX1, dstY1, - mask, filter); - if (mask == 0x0) - return; -#endif - /* Try using the BLT engine. */ mask = intel_blit_framebuffer_with_blitter(ctx, srcX0, srcY0, srcX1, srcY1, diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c index dba18d0a9fe..8b2b3fe0578 100644 --- a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c @@ -37,10 +37,6 @@ #include "intel_tex.h" #include "intel_blit.h" -#ifndef I915 -#include "brw_blorp.h" -#endif - #include "main/enums.h" #include "main/formats.h" #include "main/glformats.h" @@ -153,15 +149,11 @@ intel_miptree_create_layout(struct intel_context *intel, intel_get_texture_alignment_unit(intel, mt->format, &mt->align_w, &mt->align_h); -#ifdef I915 (void) intel; if (intel->is_945) i945_miptree_layout(mt); else i915_miptree_layout(mt); -#else - brw_miptree_layout(intel, mt); -#endif return mt; } diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c index 037dba97b5b..4a7d1cadc1d 100644 --- a/src/mesa/drivers/dri/i915/intel_screen.c +++ b/src/mesa/drivers/dri/i915/intel_screen.c @@ -90,10 +90,6 @@ const GLuint __driNConfigOptions = 13; #include "intel_tex.h" #include "intel_regions.h" -#ifndef I915 -#include "brw_context.h" -#endif - #include "i915_drm.h" #ifdef USE_NEW_INTERFACE @@ -920,15 +916,6 @@ i915CreateContext(int api, unsigned minor_version, unsigned *error, void *sharedContextPrivate); -extern bool -brwCreateContext(int api, - const struct gl_config *mesaVis, - __DRIcontext *driContextPriv, - unsigned major_version, - unsigned minor_version, - uint32_t flags, - unsigned *error, - void *sharedContextPrivate); static GLboolean intelCreateContext(gl_api api, @@ -942,7 +929,6 @@ intelCreateContext(gl_api api, { bool success = false; -#ifdef I915 __DRIscreen *sPriv = driContextPriv->driScreenPriv; struct intel_screen *intelScreen = sPriv->driverPrivate; @@ -956,12 +942,6 @@ intelCreateContext(gl_api api, major_version, minor_version, error, sharedContextPrivate); } -#else - success = brwCreateContext(api, mesaVis, - driContextPriv, - major_version, minor_version, flags, - error, sharedContextPrivate); -#endif if (success) return true; diff --git a/src/mesa/drivers/dri/i915/intel_tex_copy.c b/src/mesa/drivers/dri/i915/intel_tex_copy.c index 5a34a4c62ca..599d6019488 100644 --- a/src/mesa/drivers/dri/i915/intel_tex_copy.c +++ b/src/mesa/drivers/dri/i915/intel_tex_copy.c @@ -41,9 +41,6 @@ #include "intel_fbo.h" #include "intel_tex.h" #include "intel_blit.h" -#ifndef I915 -#include "brw_context.h" -#endif #define FILE_DEBUG_FLAG DEBUG_TEXTURE @@ -91,14 +88,7 @@ intelCopyTexSubImage(struct gl_context *ctx, GLuint dims, { struct intel_context *intel = intel_context(ctx); -#ifndef I915 - /* Try BLORP first. It can handle almost everything. */ - if (brw_blorp_copytexsubimage(intel, rb, texImage, slice, x, y, - xoffset, yoffset, width, height)) - return; -#endif - - /* Next, try the BLT engine. */ + /* Try the BLT engine. */ if (intel_copy_texsubimage(intel, intel_texture_image(texImage), xoffset, yoffset, slice, @@ -106,7 +96,7 @@ intelCopyTexSubImage(struct gl_context *ctx, GLuint dims, return; } - /* Finally, fall back to meta. This will likely be slow. */ + /* Otherwise, fall back to meta. This will likely be slow. */ perf_debug("%s - fallback to swrast\n", __FUNCTION__); _mesa_meta_CopyTexSubImage(ctx, dims, texImage, xoffset, yoffset, slice, diff --git a/src/mesa/drivers/dri/i915/intel_tex_image.c b/src/mesa/drivers/dri/i915/intel_tex_image.c index a8f1413286d..c5754c4572e 100644 --- a/src/mesa/drivers/dri/i915/intel_tex_image.c +++ b/src/mesa/drivers/dri/i915/intel_tex_image.c @@ -23,10 +23,6 @@ #include "intel_blit.h" #include "intel_fbo.h" -#ifndef I915 -#include "brw_context.h" -#endif - #define FILE_DEBUG_FLAG DEBUG_TEXTURE /* Work back from the specified level of the image to the baselevel and create a @@ -268,9 +264,6 @@ intel_set_texture_image_region(struct gl_context *ctx, intel_image->mt->level[0].slice[0].y_offset = tile_y; intel_miptree_get_tile_offsets(intel_image->mt, 0, 0, &draw_x, &draw_y); -#ifndef I915 - has_surface_tile_offset = brw_context(ctx)->has_surface_tile_offset; -#endif /* From "OES_EGL_image" error reporting. We report GL_INVALID_OPERATION * for EGL images from non-tile aligned sufaces in gen4 hw and earlier which has