From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 11 Nov 2018 05:32:29 +0000 (+0000)
Subject: add reg csr hyperlink
X-Git-Tag: convert-csv-opcode-to-binary~4849
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=27bbac02d1736d9d847b62a8e0b6a297c0df4bb7;p=libreriscv.git

add reg csr hyperlink
---

diff --git a/simple_v_extension/specification.mdwn b/simple_v_extension/specification.mdwn
index 190d3dc65..632fc75d7 100644
--- a/simple_v_extension/specification.mdwn
+++ b/simple_v_extension/specification.mdwn
@@ -410,6 +410,8 @@ The purpose of the Register CSR table is four-fold:
 * To over-ride the implicit or explicit bitwidth that the operation would
   normally give the register.
 
+TODO: update
+
 | RgCSR | | 15       | (14..8)  | 7   | (6..5) | (4..0)  |
 | ----- | | -        | -        | -   | ------ | ------- |
 | 0     | | isvec0   | regidx0  | i/f | vew0   | regkey  |