From: lkcl <lkcl@web>
Date: Tue, 21 Jun 2022 20:16:29 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1615
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=27e1d41d1a73e2dc1a75cfda6aa827d17d2d444e;p=libreriscv.git

---

diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn
index d73470cf3..208055c08 100644
--- a/openpower/sv/svp64/appendix.mdwn
+++ b/openpower/sv/svp64/appendix.mdwn
@@ -501,7 +501,9 @@ Note that the Schedule only makes sense on top of certain instructions:
 X-Form with a Register Profile of `RT,RA,RB` is fine.  Like Scalar
 Reduction, nothing is prohibited:
 the results of execution on an unsuitable instruction may simply
-not make sense.
+not make sense. Many 3-input instructions (madd, fmadd) unlike Scalar
+Reduction in particular do not make sense, but `ternlogi`, if used
+with care, would.
 
 # Fail-on-first