From: Jacob Lifshay <programmerjake@gmail.com>
Date: Thu, 16 Nov 2023 03:31:32 +0000 (-0800)
Subject: msr and svstate default to None in TestCase, they're replaced with actual values... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=27fc982e2acb12b152014621e79d5bf47f92d48f;p=openpower-isa.git

msr and svstate default to None in TestCase, they're replaced with actual values in ISACaller
---

diff --git a/src/openpower/test/common.py b/src/openpower/test/common.py
index 97115a74..b3b89876 100644
--- a/src/openpower/test/common.py
+++ b/src/openpower/test/common.py
@@ -190,10 +190,10 @@ class TestCase:
     __test__ = False  # pytest should ignore this class
 
     def __init__(self, program, name, regs=None, sprs=None, cr=0, mem=None,
-                 msr=0,
+                 msr=None,
                  do_sim=True,
                  extra_break_addr=None,
-                 svstate=0,
+                 svstate=None,
                  expected=None,
                  stop_at_pc=None,
                  test_file=None,