From: Eddie Hung <eddie@fpgeh.com>
Date: Tue, 27 Aug 2019 16:24:59 +0000 (-0700)
Subject: Ignore all 1'bx in (* init *)
X-Git-Tag: working-ls180~1095^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=28133432bea4a3fa01cd2f5e82a52a853cfccb84;p=yosys.git

Ignore all 1'bx in (* init *)
---

diff --git a/passes/sat/sat.cc b/passes/sat/sat.cc
index bcc690fa3..430bba1e8 100644
--- a/passes/sat/sat.cc
+++ b/passes/sat/sat.cc
@@ -268,9 +268,7 @@ struct SatHelper
 				RTLIL::SigSpec removed_bits;
 				for (int i = 0; i < lhs.size(); i++) {
 					RTLIL::SigSpec bit = lhs.extract(i, 1);
-					if (bit.is_fully_const() && rhs[i] == State::Sx)
-						rhs[i] = bit;
-					if (!satgen.initial_state.check_all(bit)) {
+					if (rhs[i] == State::Sx || !satgen.initial_state.check_all(bit)) {
 						removed_bits.append(bit);
 						lhs.remove(i, 1);
 						rhs.remove(i, 1);