From: Luke Leighton <lkcl@lkcl.net>
Date: Sun, 25 Feb 2018 10:09:13 +0000 (+0000)
Subject: add i2c libre-riscv bug link
X-Git-Tag: convert-csv-opcode-to-binary~5868
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=288f4c6ea70b762db3ff56e9940c1437aedb135d;p=libreriscv.git

add i2c libre-riscv bug link
---

diff --git a/shakti/m_class/I2C.mdwn b/shakti/m_class/I2C.mdwn
index 3c61a8d17..0c82462f2 100644
--- a/shakti/m_class/I2C.mdwn
+++ b/shakti/m_class/I2C.mdwn
@@ -1,5 +1,6 @@
 # I2C
 
+* <http://bugs.libre-riscv.org/show_bug.cgi?id=1>
 * <https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/>
   includes GPIO, SPI, UART, JTAG, I2C, PinCtrl, UART and PWM.  Also included
   is a Watchdog Timer and others.