From: Florent Kermarrec Date: Mon, 22 Apr 2019 06:53:43 +0000 (+0200) Subject: ci: fix test_targets/test_simple X-Git-Tag: 24jan2021_ls180~1308 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=28d80bd64146f5c11b892515aad27df04c6d8994;p=litex.git ci: fix test_targets/test_simple --- diff --git a/test/test_targets.py b/test/test_targets.py index ccbba1b1..06a63582 100644 --- a/test/test_targets.py +++ b/test/test_targets.py @@ -57,7 +57,6 @@ class TestTargets(unittest.TestCase): self.assertEqual(errors, 0) # lattice boards - def test_versa_ecp5(self): from litex.boards.targets.versa_ecp5 import BaseSoC errors = build_test([BaseSoC(**self.kwargs)]) @@ -85,7 +84,7 @@ class TestTargets(unittest.TestCase): "versa_ecp5" ] for p in platforms: - os.system("litex_simple litex.boards.platforms." + p + + os.system("litex/boards/targets/simple.py litex.boards.platforms." + p + " --cpu-type=vexriscv " + " --no-compile-software " + " --no-compile-gateware " +