From: Clifford Wolf Date: Sun, 16 Feb 2014 20:58:27 +0000 (+0100) Subject: Fixed handling of "keep" attribute on wires in opt_clean X-Git-Tag: yosys-0.3.0~145 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=28e14ee50a3effcd5335ec06f5b1c2acda008a4e;p=yosys.git Fixed handling of "keep" attribute on wires in opt_clean --- diff --git a/passes/opt/opt_clean.cc b/passes/opt/opt_clean.cc index 733a1cbf1..d330fb7bd 100644 --- a/passes/opt/opt_clean.cc +++ b/passes/opt/opt_clean.cc @@ -227,10 +227,10 @@ static void rmunused_module_signals(RTLIL::Module *module, bool purge_mode, bool std::vector del_wires; for (auto &it : module->wires) { RTLIL::Wire *wire = it.second; - if ((!purge_mode && check_public_name(wire->name)) || wire->port_id != 0) { + if ((!purge_mode && check_public_name(wire->name)) || wire->port_id != 0 || wire->get_bool_attribute("\\keep")) { RTLIL::SigSpec s1 = RTLIL::SigSpec(wire), s2 = s1; assign_map.apply(s2); - if (!used_signals.check_any(s2) && wire->port_id == 0) { + if (!used_signals.check_any(s2) && wire->port_id == 0 && !wire->get_bool_attribute("\\keep")) { del_wires.push_back(wire); } else { s1.expand();