From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 1 Oct 2020 15:11:40 +0000 (+0000)
Subject: sort sys_* pad names
X-Git-Tag: partial-core-ls180-gdsii~53
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=29040917e400818c2841faf797ffab357d5f9083;p=soclayout.git

sort sys_* pad names
---

diff --git a/experiments9/coriolis2/ioring.py b/experiments9/coriolis2/ioring.py
index ce856c9..5aab4a1 100644
--- a/experiments9/coriolis2/ioring.py
+++ b/experiments9/coriolis2/ioring.py
@@ -48,8 +48,19 @@ for (padnum, name, _), bank in zip(p.muxed_cells, p.muxed_cells_bank):
             padbank[banknum] = name
             print "sys_rst add", bank, banknum, name
             name = None
+        elif name == 'sys_pllclk':
+            name = None # ignore
+        elif name == 'sys_pllout':
+            name = 'sys_pll_48_o'
+            iopads.append(['p_' + name, name, name])
+        elif name.startswith('sys_csel'):
+            i = name[-1]
+            name2 = 'sys_clksel_i(%s)' % i
+            name = 'p_sys_clksel_' + i
+            iopads.append([name, name2, name2])
         #if name:
         #    iopads.append([pname, name, name])
+        print "sys pad", name
     # SPI Card
     elif name.startswith('mspi0') or name.startswith('mspi1'):
         suffix = name[6:]
@@ -135,6 +146,8 @@ for (padnum, name, _), bank in zip(p.muxed_cells, p.muxed_cells_bank):
             pad = ['p_' + name, name, name2 % 'o', name2 % 'i', name2 % 'oe']
             print ("I2C pad", name, pad)
             iopads.append(pad)
+        else:
+            iopads.append(['p_' + name, name, name])
     # EINT
     elif name.startswith('eint'):
         i = name[-1]