From: lkcl <lkcl@web>
Date: Thu, 3 Jun 2021 17:20:27 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~837
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=298581e0c97eedd64f07484eeaca02deafc3ca28;p=libreriscv.git

---

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index c413a35aa..0b6145f80 100644
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -98,7 +98,8 @@ Examples:
 
 "Single" is therefore redefined in SVP64 to be "half elwidth"
 rather than Double width hardcoded to 64 and Single width
-hardcoded to 32.
+hardcoded to 32.  This allows a full range of conversions
+between FP64, FP32, FP16 and BF16.
 
 ## FPR to GPR moves