From: Grigori Goronzy Date: Wed, 24 Jun 2015 01:38:02 +0000 (+0200) Subject: winsys/radeon: align BO size to page size X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=29aaab2b5f55cc6d9a84f58ce2bb8607e76a9dde;p=mesa.git winsys/radeon: align BO size to page size This is the basic granularity for BO allocations. The alignment also helps with BO reuse by the cached bufmgr. This results in a huge 45% speedup in Metro 2033 Redux on my test system. The game relies on buffer orphaning with very small buffers (hundreds of bytes in size) and that did not work efficiently before. This change may also affect other applications and games. Reviewed-by: Marek Olšák --- diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c index 78c95b15eb2..1f0caf60197 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c @@ -840,6 +840,12 @@ radeon_winsys_bo_create(struct radeon_winsys *rws, memset(&desc, 0, sizeof(desc)); desc.base.alignment = alignment; + /* Align size to page size. This is the minimum alignment for normal + * BOs. Aligning this here helps the cached bufmgr. Especially small BOs, + * like constant/uniform buffers, can benefit from better and more reuse. + */ + size = align(size, 4096); + /* Only set one usage bit each for domains and flags, or the cache manager * might consider different sets of domains / flags compatible */