From: Alexandre Oliva <aoliva@redhat.com>
Date: Wed, 16 May 2001 01:48:13 +0000 (+0000)
Subject: * elf-m10300.c (mn10300_elf_relax_section): Don't relax
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2a0fa9433c462c02e2f71b73eb6f3d21d55fc795;p=binutils-gdb.git

* elf-m10300.c (mn10300_elf_relax_section): Don't relax
negative 32-bit operands to 16 operands when the operand is
going to be zero-extended by the modified opcode.
---

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 66d8fb7099a..b180d2e6778 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,9 @@
+2001-05-15  Alexandre Oliva  <aoliva@redhat.com>
+
+	* elf-m10300.c (mn10300_elf_relax_section): Don't relax
+	negative 32-bit operands to 16 operands when the operand is
+	going to be zero-extended by the modified opcode.
+
 2001-05-12  Peter Targett  <peter.targett@arccores.com>
 
 	* cpu-arc.c (arch_info_struct): Add entry 'base' representing old
diff --git a/bfd/elf-m10300.c b/bfd/elf-m10300.c
index 268deba3be4..15380bc64ad 100644
--- a/bfd/elf-m10300.c
+++ b/bfd/elf-m10300.c
@@ -2183,6 +2183,11 @@ mn10300_elf_relax_section (abfd, sec, link_info, again)
 		  case 0x91:
 		  case 0x92:
 		  case 0x93:
+		    /* sp-based offsets are zero-extended.  */
+		    if (code >= 0x90 && code <= 0x93
+			&& (long)value < 0)
+		      continue;
+
 		    /* Note that we've changed the relocation contents, etc.  */
 		    elf_section_data (sec)->relocs = internal_relocs;
 		    free_relocs = NULL;
@@ -2231,6 +2236,11 @@ mn10300_elf_relax_section (abfd, sec, link_info, again)
 			&& (value & 0x8000))
 		      continue;
 
+		    /* mov imm16, an zero-extends the immediate.  */
+		    if (code == 0xdc
+			&& (long)value < 0)
+		      continue;
+
 		    /* Note that we've changed the relocation contents, etc.  */
 		    elf_section_data (sec)->relocs = internal_relocs;
 		    free_relocs = NULL;
@@ -2276,18 +2286,18 @@ mn10300_elf_relax_section (abfd, sec, link_info, again)
 		    break;
 
 		  /* mov (abs32),an    -> mov (abs16),an
-		     mov (d32,sp),an   -> mov (d32,sp),an
-		     mov (d32,sp),dn   -> mov (d32,sp),dn
-		     movbu (d32,sp),dn -> movbu (d32,sp),dn
-		     movhu (d32,sp),dn -> movhu (d32,sp),dn
+		     mov (d32,sp),an   -> mov (d16,sp),an
+		     mov (d32,sp),dn   -> mov (d16,sp),dn
+		     movbu (d32,sp),dn -> movbu (d16,sp),dn
+		     movhu (d32,sp),dn -> movhu (d16,sp),dn
 		     add imm32,dn      -> add imm16,dn
 		     cmp imm32,dn      -> cmp imm16,dn
 		     add imm32,an      -> add imm16,an
 		     cmp imm32,an      -> cmp imm16,an
-		     and imm32,dn      -> and imm32,dn
-		     or imm32,dn       -> or imm32,dn
-		     xor imm32,dn      -> xor imm32,dn
-		     btst imm32,dn     -> btst imm32,dn */
+		     and imm32,dn      -> and imm16,dn
+		     or imm32,dn       -> or imm16,dn
+		     xor imm32,dn      -> xor imm16,dn
+		     btst imm32,dn     -> btst imm16,dn */
 
 		  case 0xa0:
 		  case 0xb0:
@@ -2303,6 +2313,16 @@ mn10300_elf_relax_section (abfd, sec, link_info, again)
 		  case 0xe1:
 		  case 0xe2:
 		  case 0xe3:
+		    /* cmp imm16, an zero-extends the immediate.  */
+		    if (code == 0xdc
+			&& (long)value < 0)
+		      continue;
+
+		    /* So do sp-based offsets.  */
+		    if (code >= 0xb0 && code <= 0xb3
+			&& (long)value < 0)
+		      continue;
+
 		    /* Note that we've changed the relocation contents, etc.  */
 		    elf_section_data (sec)->relocs = internal_relocs;
 		    free_relocs = NULL;