From: Sebastien Bourdeauducq Date: Mon, 2 Apr 2012 17:21:43 +0000 (+0200) Subject: fhdl: phase out pads X-Git-Tag: 24jan2021_ls180~2099^2~953 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2a4e49e38195d4550cf7d880a017551003423cc6;p=litex.git fhdl: phase out pads --- diff --git a/doc/index.rst b/doc/index.rst index 7b2060fa..b7a03d67 100644 --- a/doc/index.rst +++ b/doc/index.rst @@ -233,7 +233,6 @@ A "fragment" is a unit of logic, which is composed of: * a list of synchronous statements. * a list of instances. * a list of memories. -* a set of pads, which are signals intended to be connected to off-chip devices. * a list of simulation functions (see :ref:`simulating`). Fragments can reference arbitrary signals, including signals that are referenced in other fragments. Fragments can be combined using the "+" operator, which returns a new fragment containing the concatenation of each pair of lists. diff --git a/migen/fhdl/structure.py b/migen/fhdl/structure.py index 89545c79..c8517270 100644 --- a/migen/fhdl/structure.py +++ b/migen/fhdl/structure.py @@ -268,7 +268,7 @@ class Memory: self.init = init class Fragment: - def __init__(self, comb=None, sync=None, instances=None, memories=None, pads=set(), sim=None): + def __init__(self, comb=None, sync=None, instances=None, memories=None, sim=None): if comb is None: comb = [] if sync is None: sync = [] if instances is None: instances = [] @@ -278,7 +278,6 @@ class Fragment: self.sync = _sl(sync) self.instances = instances self.memories = memories - self.pads = pads self.sim = sim def __add__(self, other): @@ -286,7 +285,6 @@ class Fragment: self.sync.l + other.sync.l, self.instances + other.instances, self.memories + other.memories, - self.pads | other.pads, self.sim + other.sim) def call_sim(self, simulator): diff --git a/migen/fhdl/verilog.py b/migen/fhdl/verilog.py index fa4c4ae4..4552c0d3 100644 --- a/migen/fhdl/verilog.py +++ b/migen/fhdl/verilog.py @@ -244,7 +244,6 @@ def convert(f, ios=set(), name="top", if rst_signal is None: rst_signal = Signal(name_override="sys_rst") ios.add(rst_signal) - ios |= f.pads ns = build_namespace(list_signals(f) \ | list_inst_ios(f, True, True, True) \