From: Kenneth Graunke Date: Mon, 25 Jan 2016 23:23:24 +0000 (-0800) Subject: i965: Require a UBO offset alignment of 32 bytes. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2a5e4f15efb7be113cbc310bb7d809578153953d;p=mesa.git i965: Require a UBO offset alignment of 32 bytes. Soon, we're going to start providing UBO data to shaders as push constants, rather than requiring them to issue pull loads. The 3DSTATE_CONSTANT_* commands require 32 byte aligned pointers. So, we need to increase this from 16 to 32. Reviewed-by: Matt Turner --- diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index d8f187ff7e7..b23e811f305 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -614,8 +614,11 @@ brw_initialize_context_constants(struct brw_context *brw) * the element in the buffer." * * However, unaligned accesses are slower, so enforce buffer alignment. + * + * In order to push UBO data, 3DSTATE_CONSTANT_XS imposes an additional + * restriction: the start of the buffer needs to be 32B aligned. */ - ctx->Const.UniformBufferOffsetAlignment = 16; + ctx->Const.UniformBufferOffsetAlignment = 32; /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so * that we can safely have the CPU and GPU writing the same SSBO on