From: Yunsup Lee Date: Sun, 11 Dec 2011 01:40:07 +0000 (-0800) Subject: fix utidx assign bug, make ut code execute faster X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2a6e490332f1b3c258b1e6aec190dc64761bf09a;p=riscv-isa-sim.git fix utidx assign bug, make ut code execute faster --- diff --git a/riscv/insns/vf.h b/riscv/insns/vf.h index d1527b3..270c6fd 100644 --- a/riscv/insns/vf.h +++ b/riscv/insns/vf.h @@ -5,5 +5,5 @@ for (int i=0; iutmode = true; uts[i]->run = true; while (uts[i]->utmode) - uts[i]->step(1, false); // XXX + uts[i]->step(100, false); // XXX } diff --git a/riscv/processor.cc b/riscv/processor.cc index 99539f5..6df910c 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -20,10 +20,11 @@ processor_t::processor_t(sim_t* _sim, mmu_t* _mmu, uint32_t _id) processor_t::processor_t(sim_t* _sim, mmu_t* _mmu, uint32_t _id, uint32_t _utidx) - : sim(*_sim), mmu(*_mmu), id(_id), utidx(_utidx) + : sim(*_sim), mmu(*_mmu), id(_id) { reset(); set_sr(sr | SR_EF | SR_EV); + utidx = _utidx; // microthreads don't possess their own microthreads for (int i=0; i