From: kajoljain379 <kajoljain797@gmail.com>
Date: Tue, 19 Mar 2019 08:39:55 +0000 (+0530)
Subject: arch-power: Add function to Write in physical memory
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2ab003ac81fa110249113de6ae8f81347d68739d;p=gem5.git

arch-power: Add function to Write in physical memory

* Add a helper to write to the physical memory.
* This will be used in the subsequent patches to update the
  "Reference" and the "Change" bits on the page-table entry
  whenever a page is accessed.

Change-Id: I89c732be5884341ae0d33801a63578dbd2e08815
Signed-off-by: kajoljain379 <kajoljain797@gmail.com>
---

diff --git a/src/arch/power/radixwalk.cc b/src/arch/power/radixwalk.cc
index 7bc671684..295f4a955 100644
--- a/src/arch/power/radixwalk.cc
+++ b/src/arch/power/radixwalk.cc
@@ -69,6 +69,23 @@ RadixWalk::readPhysMem(uint64_t addr, uint64_t dataSize)
     return ret;
 }
 
+uint64_t
+RadixWalk::writePhysMem(uint64_t addr, uint64_t dataSize)
+{
+    uint64_t ret;
+    Request::Flags flags = Request::PHYSICAL;
+
+    RequestPtr request = new Request(addr, dataSize, flags, this->masterId);
+    Packet *write = new Packet(request, MemCmd::WriteReq);
+    write->allocate();
+    this->port.sendAtomic(write);
+    ret = write->get<uint64_t>();
+
+    delete write->req;
+
+    return ret;
+}
+
 uint32_t geteffLPID(ThreadContext *tc)
 {
     Msr msr = tc->readIntReg(INTREG_MSR);
diff --git a/src/arch/power/radixwalk.hh b/src/arch/power/radixwalk.hh
index 8c9cd3813..dae379bff 100644
--- a/src/arch/power/radixwalk.hh
+++ b/src/arch/power/radixwalk.hh
@@ -38,6 +38,7 @@ namespace PowerISA
       uint64_t readPhysMem(uint64_t addr, uint64_t dataSize);
 
       public:
+        uint64_t writePhysMem(uint64_t addr, uint64_t dataSize);
 
         BitUnion64(Rpde)
                 Bitfield<63> valid;