From: Neel Date: Sun, 11 Mar 2018 17:07:49 +0000 (+0530) Subject: change rule names to allow implicit scheduling X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2ab18b3c42ddb6809145cc131d77679ef98b461b;p=pinmux.git change rule names to allow implicit scheduling When inputs from multiple IO cells drive the same interface/peripheral there needs to be an implicite priority between the rules updating the same wire (going to the interface). The current pinmap in this commit creates the above scenario. To enable the implicit scheduling the rules names need to be different. This commit ensures this as well Also currently the ordering is based on the order in which the user provides the two instances. the first instance os uart_rx is given priority over the later instance in the pinmap.txt file. --- diff --git a/pinmap.txt b/pinmap.txt index d3dc0fa..ec38619 100644 --- a/pinmap.txt +++ b/pinmap.txt @@ -1,5 +1,5 @@ muxed 0 uart0_tx spi0_sclk 1 uart0_rx spi0_mosi -2 uart1_tx spi0_ss -3 uart1_rx spi0_miso +2 spi0_ss uart0_rx +3 uart1_tx spi0_miso diff --git a/src/actual_pinmux.py b/src/actual_pinmux.py index fe16198..95695b9 100644 --- a/src/actual_pinmux.py +++ b/src/actual_pinmux.py @@ -4,12 +4,12 @@ from string import digits ## dictionary of properties of signals that are supported. dictionary={ - "uart_rx":"input", - "uart_tx":"output", - "spi_sclk":"output", - "spi_mosi":"output", - "spi_ss": "output", - "spi_miso":"input" + "uart_rx" :"input", + "uart_tx" :"output", + "spi_sclk" :"output", + "spi_mosi" :"output", + "spi_ss" :"output", + "spi_miso" :"input" } @@ -19,7 +19,7 @@ assign_cell='''cell{0}_out=wrmux{0}=={1}?''' # second argument is the mux value. # Third argument is the signal from the pinmap file input_wire=''' - rule assign_input_for_{2}(wrmux{0}=={1}); + rule assign_input_for_{2}_on_cell{0}(wrmux{0}=={1}); wr{2}<=cell{0}_in; endrule ''' @@ -57,7 +57,7 @@ for lineno,line in enumerate(pinmap_file): if(x==None): print "Error: The signal : "+str(line1[i+1])+" in lineno: "+str(lineno)+"of pinmap.txt is not present in the current dictionary.\nSoln: Either update the dictionary or fix typo." exit(1) - if(x=="input"): + if(x=="input" or x=="inout"): pinmux=pinmux+input_wire.format(line1[0],i,line1[i+1])+"\n" ################################################################################ ###########################################